Issued Patents All Time
Showing 25 most recent of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12402328 | Switching cell with direct contact to fixed resistor element | Andrea Redaelli | 2025-08-26 |
| 12356634 | Phase change memory | Fausto Piazza, Andrea Redaelli | 2025-07-08 |
| 12114580 | Phase-change memory cell | Gabriele Navarro | 2024-10-08 |
| 11653579 | Phase-change memory cell | Gabriele Navarro | 2023-05-16 |
| 11641786 | Memory device | Gabriele Navarro | 2023-05-02 |
| 11355702 | Memory device | Gabriele Navarro | 2022-06-07 |
| 11227992 | Memory cell | — | 2022-01-18 |
| 10910558 | Memory device | Gabriele Navarro | 2021-02-02 |
| 9577188 | Semiconductor constructions and methods of forming memory cells | Carmela Cupeta, Andrea Redaelli | 2017-02-21 |
| 9166159 | Semiconductor constructions and methods of forming memory cells | Carmela Cupeta, Andrea Redaelli | 2015-10-20 |
| 8963220 | Shallow trench isolation for a memory | Alessandro Grossi, Marcello Mariani | 2015-02-24 |
| 8664702 | Shallow trench isolation for a memory | Alessandro Grossi, Marcello Mariani | 2014-03-04 |
| 8097506 | Shallow trench isolation for a memory | Alessandro Grossi, Marcello Mariani | 2012-01-17 |
| 7560782 | Transistor structure with high input impedance and high current capability | Fabio Pellizzer | 2009-07-14 |
| 7320904 | Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substrate and corresponding circuit | Alfonso Maurelli, Paola Zabberoni | 2008-01-22 |
| 7304485 | Analysis of the quality of contacts and vias in multi-metal fabrication processes of semiconductor devices, method and test chip architecture | Alfonso Maurelli | 2007-12-04 |
| 7012832 | Magnetic memory cell with plural read transistors | Kyusik Sin, Matthew R. Gibbons, William D. Jensen, Hugh C. Hiner, Xizeng Stone Shi +2 more | 2006-03-14 |
| 7001800 | Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substrate and corresponding circuit | Alfonso Maurelli, Paola Zabberoni | 2006-02-21 |
| 6903995 | Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method | Emilio Camerlenghi, Tecla Ghilardi, Mauro Sali, Giorgio Servalli | 2005-06-07 |
| 6876033 | Electrically erasable and programmable non-volatile memory cell | Paolo Ghezzi, Alfonso Maurelli, Loris Vendrame, Paola Zabberoni | 2005-04-05 |
| 6841445 | Method of making floating gate non-volatile memory cell with low erasing voltage having double layer gate dielectric | — | 2005-01-11 |
| 6713347 | Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitry | Alfonso Maurelli | 2004-03-30 |
| 6710394 | Method of making floating gate non-volatile memory cell with low erasing voltage having double layer gate dielectric | — | 2004-03-23 |
| 6576950 | EEPROM type non-volatile memory cell and corresponding production method | Alfonso Maurelli, Nicola Zatelli | 2003-06-10 |
| 6532171 | Nonvolatile semiconductor memory capable of selectively erasing a plurality of elemental memory units | Roberto Gastaldi, Giulio Casagrande, Giovanni Campardo, Rino Micheloni | 2003-03-11 |