Issued Patents All Time
Showing 51–56 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5466622 | Process for fabricating integrated devices including nonvolatile memories and transistors with tunnel oxide protection | — | 1995-11-14 |
| 5328863 | Process for manufacturing a ROM cell with low drain capacitance | Silvia Lucherini, Bruno Vajana | 1994-07-12 |
| 5322803 | Process for the manufacture of a component to limit the programming voltage and to stabilize the voltage incorporated in an electric device with EEPROM memory cells | Giuseppe Corda, Paolo Ghezzi, Carlo Riva, Bruno Vajana | 1994-06-21 |
| 4968645 | Method for manufacturing MOS/CMOS monolithic integrated circuits including silicide and polysilicon patterning | Livio Baldi, Franco Maggioni | 1990-11-06 |
| 4935790 | EEPROM memory cell with a single level of polysilicon programmable and erasable bit by bit | Giuseppe Corda, Carlo Riva | 1990-06-19 |
| 4806501 | Method for making twin tub CMOS devices | Livio Baldi | 1989-02-21 |