Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10261793 | Instruction predication using instruction address pattern matching | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2019-04-16 |
| 10067556 | Branch prediction with power usage prediction and control | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2018-09-04 |
| 10042417 | Branch prediction with power usage prediction and control | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2018-08-07 |
| 9395804 | Branch prediction with power usage prediction and control | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2016-07-19 |
| 9223753 | Dynamic range adjusting floating point execution unit | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2015-12-29 |
| 9195463 | Processing core with speculative register preprocessing in unused execution unit cycles | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2015-11-24 |
| 9075599 | Opcode space minimizing architecture utilizing a least significant portion of an instruction address as upper register address bits | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2015-07-07 |
| 8930432 | Floating point execution unit with fixed point functionality | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2015-01-06 |
| 8880852 | Detecting logically non-significant operation based on opcode and operand and setting flag to decode address specified in subsequent instruction as different address | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2014-11-04 |
| 8707094 | Fault tolerant stability critical execution checking using redundant execution pipelines | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2014-04-22 |
| 8629867 | Performing vector multiplication | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2014-01-14 |
| 8522254 | Programmable integrated processor blocks | Eric O. Mejdrich, Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs +1 more | 2013-08-27 |
| 8412760 | Dynamic range adjusting floating point execution unit | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2013-04-02 |
| 8412980 | Fault tolerant stability critical execution checking using redundant execution pipelines | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2013-04-02 |
| 8255674 | Implied storage operation decode using redundant target address detection | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2012-08-28 |
| 8028153 | Data dependent instruction decode | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2011-09-27 |
| 7975172 | Redundant execution of instructions in multistage execution pipeline during unused execution cycles | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2011-07-05 |
| 7948894 | Data flow control for simultaneous packet reception | Bruce Beukema, Robert A. Shearer | 2011-05-24 |
| 7873816 | Pre-loading context states by inactive hardware thread in advance of context switch | Stephen Joseph Schwinn, Matthew R. Tubbs, Charles D. Wait | 2011-01-18 |
| 7814299 | Designating operands with fewer bits in instruction code by indexing into destination register history table for each thread | Adam J. Muff, Matthew R. Tubbs, Charles D. Wait | 2010-10-12 |
| 7385925 | Data flow control method for simultaneous packet reception | Bruce Beukema, Robert A. Shearer | 2008-06-10 |
| 7260765 | Methods and apparatus for dynamically reconfigurable parallel data error checking | Robert A. Shearer | 2007-08-21 |
| 7187863 | Identifying substreams in parallel/serial data link | Susan M. Cox, Jack Chris Randolph, Dale J. Thomforde, Frederick J. Ziegler | 2007-03-06 |
| 7079528 | Data communication method | Frederick J. Ziegler, Jack Chris Randolph, Susan M. Cox, Dale J. Thomforde, Robert Neill Newshutz | 2006-07-18 |
| 7065101 | Modification of bus protocol packet for serial data synchronization | Frederick J. Ziegler, Jack Chris Randolph, Susan M. Cox, Dale J. Thomforde | 2006-06-20 |