Issued Patents All Time
Showing 25 most recent of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11455011 | Modular computing device with common AC power | Peter Atkinson, James Hunter, Russell D. Hoover, Jay Tsao, Gregory M. Daly +1 more | 2022-09-27 |
| 10198578 | Secure privilege level execution and access protection | Jonathan E. Lange, John V. Sell, Ling Tony Chen | 2019-02-05 |
| 9911212 | Resetting of dynamically grown accelerated data structure | David Keith Fowler, Paul E. Schardt, Robert A. Shearer | 2018-03-06 |
| 9530000 | Secure privilege level execution and access protection | Jonathan E. Lange, John V. Sell, Ling Tony Chen | 2016-12-27 |
| 9495724 | Single precision vector permute immediate with “word” vector write mask | Adam J. Muff | 2016-11-15 |
| 9354887 | Instruction buffer bypass of target instruction in response to partial flush | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2016-05-31 |
| 9292965 | Accelerated data structure positioning based upon view orientation | David Keith Fowler, Paul E. Schardt, Robert A. Shearer | 2016-03-22 |
| 9075623 | External auxiliary execution unit interface for format conversion of instruction from issue unit to off-chip auxiliary execution unit | Paul E. Schardt, Robert A. Shearer, Corey V. Swenson | 2015-07-07 |
| 9041713 | Dynamic spatial index remapping for optimal aggregate performance | Jeffrey Douglas Brown, Russell D. Hoover, Robert A. Shearer | 2015-05-26 |
| 8898396 | Software pipelining on a network on chip | Paul E. Schardt, Robert A. Shearer | 2014-11-25 |
| 8836709 | Vector register file caching of context data structure for maintaining state data in a multithreaded image processing pipeline | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2014-09-16 |
| 8773449 | Rendering of stereoscopic images with multithreaded rendering software pipeline | Russell D. Hoover, Paul E. Schardt, Robert A. Shearer | 2014-07-08 |
| 8726295 | Network on chip with an I/O accelerator | Russell D. Hoover, Jon K. Kriegel | 2014-05-13 |
| 8719455 | DMA-based acceleration of command push buffer between host and target devices | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2014-05-06 |
| 8711163 | Reuse of static image data from prior image frames to reduce rasterization requirements | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2014-04-29 |
| 8692825 | Parallelized streaming accelerated data structure generation | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2014-04-08 |
| 8661455 | Performance event triggering through direct interthread communication on a network on chip | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2014-02-25 |
| 8627329 | Multithreaded physics engine with predictive load balancing | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2014-01-07 |
| 8619078 | Parallelized ray tracing | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2013-12-31 |
| 8593459 | Tree insertion depth adjustment based on view frustum and distance culling | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2013-11-26 |
| 8587594 | Allocating resources based on a performance statistic | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2013-11-19 |
| 8587596 | Multithreaded software rendering pipeline with dynamic performance-based reallocation of raster threads | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2013-11-19 |
| 8572324 | Network on chip with caching restrictions for pages of computer memory | Russell D. Hoover | 2013-10-29 |
| 8564600 | Streaming physics collision detection in multithreaded rendering software pipeline | Paul E. Schardt, Robert A. Shearer | 2013-10-22 |
| 8549262 | Instruction operand addressing using register address sequence detection | Adam J. Muff, Robert A. Shearer, Matthew R. Tubbs | 2013-10-01 |