Issued Patents All Time
Showing 25 most recent of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8824819 | Variable-length code decoder | Chad Fogg, Nital Patwa, Parin Bhadrik Dalal, Stephen C. Purcell, Stephen C. Hale | 2014-09-02 |
| 8788792 | Apparatus for executing programs for a first computer architecture on a computer of a second architecture | John S. Yates, Jr., Matthew F. Storch, Sandeep Nijhawan, Dale R. Jurich | 2014-07-22 |
| 8412916 | Computing system having CPU and bridge operating using CPU frequency | Adrian Sfarti, Michael Frank, Arkadi Avrukin | 2013-04-02 |
| 8381223 | Method and apparatus for dynamic allocation of processing resources | Paul Campbell, Don A. Van Dyke, Ali Alasti, Stephen C. Purcell | 2013-02-19 |
| 8356144 | Vector processor system | Richard E. Hessel, Chetana N. Keltcher, Nathan Tuck | 2013-01-15 |
| 8127121 | Apparatus for executing programs for a first computer architechture on a computer of a second architechture | John S. Yates, Jr., Matthew F. Storch, Sandeep Nijhawan, Dale R. Jurich | 2012-02-28 |
| 8121828 | Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions | John S. Yates, Jr., David L. Reese, Paul H. Hohensee, Stephen C. Purcell | 2012-02-21 |
| 8086055 | Variable-length code decoder | Chad Fogg, Nital Patwa, Parin Bhadrik Dalal, Stephen C. Purcell, Steve C. Hale | 2011-12-27 |
| 8074055 | Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code | John S. Yates, Jr., David L. Reese, Tiruvur R. Ramesh, Paul H. Hohensee | 2011-12-06 |
| 8065504 | Using on-chip and off-chip look-up tables indexed by instruction address to control instruction execution in a processor | John S. Yates, Jr., David L. Reese, Paul H. Hohensee, Shalesh Thusoo, Tiruvur R. Ramesh | 2011-11-22 |
| 7987465 | Method and apparatus for dynamic allocation of processing resources | Paul Campbell, Don A. Van Dyke, Ali Alasti, Stephen C. Purcell | 2011-07-26 |
| 7941647 | Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination | John S. Yates, Jr., David L. Reese, T. R. Ramesh, Paul H. Hohensee | 2011-05-10 |
| 7769988 | Method of integrating a personal computing system and apparatus thereof | Adrian Sfarti, Michael Frank, Arkadi Avrukin | 2010-08-03 |
| 7661107 | Method and apparatus for dynamic allocation of processing resources | Paul Campbell, Don A. Van Dyke, Ali Alasti, Stephen C. Purcell | 2010-02-09 |
| 7543119 | Vector processor | Richard E. Hessel, Nathan Tuck, Chetana N. Keltcher | 2009-06-02 |
| 7254806 | Detecting reordered side-effects | John S. Yates, Jr., David L. Reese, Paul H. Hohensee | 2007-08-07 |
| 7254231 | Encryption/decryption instruction set enhancement | Don A. Van Dyke, Stephen C. Purcell | 2007-08-07 |
| 7228404 | Managing instruction side-effects | Ronak Subhas Patel, T. R. Ramesh, Shalesh Thusoo, Gurjeet S. Saund, Sanjay Mansingh +1 more | 2007-06-05 |
| 7069421 | Side tables annotating an instruction stream | John S. Yates, Jr., David L. Reese, Paul H. Hohensee, T. R. Ramesh | 2006-06-27 |
| 7065633 | System for delivering exception raised in first architecture to operating system coded in second architecture in dual architecture CPU | John S. Yates, Jr., Matthew F. Storch, Sandeep Nijhawan, Dale R. Jurich | 2006-06-20 |
| 7047394 | Computer for execution of RISC and CISC instruction sets | Paul Campbell, Don A. Van Dyke | 2006-05-16 |
| 7013456 | Profiling execution of computer programs | Paul H. Hohensee, David L. Reese, John S. Yates, Jr., T. R. Ramesh, Shalesh Thusoo +3 more | 2006-03-14 |
| 6954923 | Recording classification of instructions executed by a computer | John S. Yates, Jr., David L. Reese | 2005-10-11 |
| 6941545 | Profiling of computer programs executing in virtual memory systems | David L. Reese, John S. Yates, Jr., Paul H. Hohensee, T. R. Ramesh, Shalesh Thusoo +2 more | 2005-09-06 |
| 6934832 | Exception mechanism for a computer | Paul Campbell, Shalesh Thusoo, T. R. Ramesh, Alan McNaughton | 2005-08-23 |