Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9514267 | System on chip I/O connectivity verification in presence of low power design considerations | Praveen Tiwari | 2016-12-06 |
| 9032339 | Ranking verification results for root cause analysis | Kaushik De, Rajarshi Mukherjee, Mahantesh D. Narwade | 2015-05-12 |
| 8302044 | Abstraction-based livelock/deadlock checking for hardware verification | In-Ho Moon | 2012-10-30 |
| 7454727 | Method and Apparatus for Solving Sequential Constraints | Eduard Cerny, Ashvin M. Dsouza, Pei-Hsin Ho | 2008-11-18 |
| 7415684 | Facilitating structural coverage of a design during design verification | Mandar Munishwar | 2008-08-19 |
| 7130783 | Simulation-based functional verification of microcircuit designs | Pei-Hsin Ho, Robert F. Damiano | 2006-10-31 |
| 7076753 | Method and apparatus for solving sequential constraints | Eduard Cerny, Ashvin M. Dsouza, Pei-Hsin Ho | 2006-07-11 |
| 6397169 | Adaptive cell separation and circuit changes driven by maximum capacitance rules | Narendra V. Shenoy, Hi-Keung Tony Ma, Mahesh A. Iyer, Robert F. Damiano | 2002-05-28 |