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USPTO Patent Rankings Data through Dec 31, 2025
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Eduard Cerny — 12 Patents

SYSynopsys: 11 patents #81 of 2,302Top 4%
LOLogicvision: 1 patents #13 of 30Top 45%
Montréal, CA: #303 of 4,862 inventorsTop 7%
Overall (All Time): #396,045 of 4,157,543Top 10%
12 Patents All Time
Eduard Cerny has been granted 12 US patents while listed as an inventor at Synopsys. The first was granted in 2002 and the most recent in January 2023. Eduard Cerny ranks #396,045 of 4,157,543 US inventors in our database (top 9.5%). Patent records list Eduard Cerny in Montréal, QC, CA.

Issued Patents All Time

Showing 1–12 of 12 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11544435 On-the-fly computation of analog mixed-signal (AMS) measurements Dmitry Korchemny, Ilya Kudryavtsev, Dmitriy Mosheyev 2023-01-03 $314,723,000
11501050 Analog mixed-signal assertion-based checker system Dmitry Korchemny, Ilya Kudryavtsev 2022-11-15 $160,583,000
11188695 Unified functional coverage and synthesis flow for formal verification and emulation Dmitry Korchemny, Ashok Kumar Bhatt, Hanish Singla 2021-11-30 $60,918,000
10846455 Automatic definition and extraction of functional coverage metric for emulation-based verification Saptarshi Ghosh, Yogesh Pandey, Sivaprasad Acharya 2020-11-24 $63,802,000
10831956 Efficient execution of alternating automaton representing a safety assertion for a circuit Gerald Taylor 2020-11-10 $31,326,000
9626468 Assertion extraction from design and its signal traces Diganchal Chakraborty, Saptarshi Ghosh, Yogesh Pandey 2017-04-18 $18,897,000
8527921 Constrained random simulation coverage closure guided by a cover property Surrendra A. Dudani, William R. Dufresne 2013-09-03 $3,459,000
8448109 Vector evaluation of assertions Surrendra A. Dudani, Samik Sengupta 2013-05-21 $7,246,000
7797123 Method and apparatus for extracting assume properties from a constrained random test-bench Kaushik De, Pallab Dasgupta, Bhaskar Pal, Partha Pratim Chakrabarti 2010-09-14 $2,885,000
7454727 Method and Apparatus for Solving Sequential Constraints Ashvin M. Dsouza, Kevin M. Harer, Pei-Hsin Ho 2008-11-18 $3,128,000
7076753 Method and apparatus for solving sequential constraints Ashvin M. Dsouza, Kevin M. Harer, Pei-Hsin Ho 2006-07-11 $12,569,000
6363520 Method for testability analysis and test point insertion at the RT-level of a hardware development language (HDL) specification Samir Boubezari, Bozena Kaminska, Benoit Nadeau-Dostie 2002-03-26 $3,185,000