JD

Joerg Deutschle

IBM: 15 patents #7,450 of 70,183Top 15%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
📍 Winnenden, DE: #12 of 380 inventorsTop 4%
Overall (All Time): #291,906 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDate
11775444 Fetch request arbiter Willm Hinrichs, Markus Kaltenbach, Simon H. Friedmann, Thomas Koehler 2023-10-03
11163579 Instruction generation based on selection or non-selection of a special command Ursel Hahn, Joerg Walter, Ernst-Dieter Weissenberger 2021-11-02
10229035 Instruction generation based on selection or non-selection of a special command Ursel Hahn, Joerg Walter, Ernst-Dieter Weissenberger 2019-03-12
9904616 Instruction output dependent on a random number-based selection or non-selection of a special command from a group of commands Ursel Hahn, Joerg Walter, Ernst-Dieter Weissenberger 2018-02-27
9697135 Suppressing virtual address translation utilizing bits and instruction tagging Ute Gaertner, Lisa C. Heller 2017-07-04
9405870 Generating coverage data for a switch frequency of HDL or VHDL signals Lothar Felten, Ursel Hahn, Klaus Keuerleber 2016-08-02
9330018 Suppressing virtual address translation utilizing bits and instruction tagging Ute Gaertner, Lisa C. Heller 2016-05-03
9330017 Suppressing virtual address translation utilizing bits and instruction tagging Ute Gaertner, Lisa C. Heller 2016-05-03
9262626 Stack entry overwrite protection Wolfgang Gellerich, Bernhard Kick, Gerrit Koch 2016-02-16
9245110 Stack entry overwrite protection Wolfgang Gellerich, Bernhard Kick, Gerrit Koch 2016-01-26
9098653 Verifying processor-sparing functionality in a simulation environment Stefan Letz, Bodo Hoppe, Erica Stuecheli, Brian W. Thompto 2015-08-04
9092382 Reducing microprocessor performance loss due to translation table coherency in a multi-processor system Ute Gaertner, Lisa C. Heller 2015-07-28
9069715 Reducing microprocessor performance loss due to translation table coherency in a multi-processor system Ute Gaertner, Lisa C. Heller 2015-06-30
9015025 Verifying processor-sparing functionality in a simulation environment Stefan Letz, Bodo Hoppe, Erica Stuecheli, Brian W. Thompto 2015-04-21
8151085 Method for address translation in virtual machines Ute Gaertner, Erwin Pfeffer, Chung-Lung K. Shum, Bruce Wagar 2012-04-03
8117574 Implementing a serialization construct within an environment of parallel data flow graphs Harald Gerst, Joerg Walter 2012-02-14