| 8108617 |
Method to bypass cache levels in a cache coherent system |
Timothy H. Heil, Andrew Henry Wottreng |
2012-01-31 |
| 8028118 |
Using an index value located on a page table to index page attributes |
Timothy H. Heil, Andrew Henry Wottreng |
2011-09-27 |
| 7739477 |
Multiple page size address translation incorporating page size prediction |
Jeffrey Powers Bradford, Jason N. Dale, Kimberly M. Fernsler, Timothy H. Heil |
2010-06-15 |
| 7284112 |
Multiple page size address translation incorporating page size prediction |
Jeffrey Powers Bradford, Jason N. Dale, Kimberly M. Fernsler, Timothy H. Heil |
2007-10-16 |
| 6314500 |
Selective routing of data in a multi-level memory architecture based on source identification information |
— |
2001-11-06 |
| 6049867 |
Method and system for multi-thread switching only when a cache miss occurs at a second or higher level |
Richard J. Eickemeyer, Ross E. Johnson, Harold F. Kossman, Steven R. Kunkel, Timothy John Mullins |
2000-04-11 |
