Issued Patents All Time
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7117403 | Method and device for generating digital signal patterns | Wolfgang Ernst, Justus Kuhn, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2006-10-03 |
| 7117404 | Test circuit for testing a synchronous memory circuit | Wolfgang Ernst, Justus Kuhn, Jens Lüpke, Peter Poechmüller, Jochen Mueller +1 more | 2006-10-03 |
| 7062690 | System for testing fast synchronous digital circuits, particularly semiconductor memory chips | Wolfgang Ernst, Justus Kuhn, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2006-06-13 |
| 6973008 | Apparatus for flexible deactivation of word lines of dynamic memory modules and method therefor | — | 2005-12-06 |
| 6971039 | DDR to SDR conversion that decodes read and write accesses and forwards delayed commands to first and second memory modules | Sebastian Kuhne, Bernd Klehn | 2005-11-29 |
| 6957373 | Address generator for generating addresses for testing a circuit | Wolfgang Ernst, Justus Kuhn, Jens Luepke, Peter Poechmüller, Jochen Mueller +1 more | 2005-10-18 |
| 6871306 | Method and device for reading and for checking the time position of data response signals read out from a memory module to be tested | Wolfgang Ernst, Justus Kuhn, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-03-22 |
| 6865707 | Test data generator | Wolfgang Ernst, Justus Kuhn, Jens Luepke, Jochen Mueller, Peter Poechmueller +1 more | 2005-03-08 |
| 6862702 | Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices | Wolfgang Ernst, Justus Kuhn, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-03-01 |
| 6853206 | Method and probe card configuration for testing a plurality of integrated circuits in parallel | Michael Hübner, Justus Kuhn, Jochen Müller, Peter P{hacek over (o)}chmüller, Jürgen Weidenhöfer | 2005-02-08 |
| 6839397 | Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits | Wolfgang Ernst, Justus Kuhn, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-01-04 |
| 6812689 | Method and device for offset-voltage free voltage measurement and adjustment of a reference voltage source of an integrated semiconductor circuit | Wolfgang Anton Spirkl | 2004-11-02 |
| 6779124 | Selectively deactivating a first control loop in a dual control loop circuit during data transmission | Rainer Höhler | 2004-08-17 |
| 6762611 | Test configuration and test method for testing a plurality of integrated circuits in parallel | Michael Hübner, Justus Kuhn, Jochen Müller, Peter Pöchmüller, Jürgen Weidenhöfer | 2004-07-13 |
| 6756699 | Device and method for calibrating the pulse duration of a signal source | Udo Hartmann | 2004-06-29 |
| 6744272 | Test circuit | Wolfgang Ernst, Justus Kuhn, Jens Luepke, Jochen Mueller, Peter Poechmueller +1 more | 2004-06-01 |
| 6728147 | Method for on-chip testing of memory cells of an integrated memory circuit | Peter Beer, Jochen Kallscheuer | 2004-04-27 |
| 6721904 | System for testing fast integrated digital circuits, in particular semiconductor memory modules | Wolfgang Ernst, Justus Kuhn, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2004-04-13 |
| 6618305 | Test circuit for testing a circuit | Wolfgang Ernst, Peter Poechmueller, Justus Kuhn, Jens Luepke, Jochen Mueller +1 more | 2003-09-09 |
| 6612738 | Method for determining the temperature of a semiconductor chip and semiconductor chip with temperature measuring configuration | Peter Beer, Manfred Dobler | 2003-09-02 |
| 6581171 | Circuit configuration for the burn-in test of a semiconductor module | — | 2003-06-17 |
| 6556492 | System for testing fast synchronous semiconductor circuits | Wolfgang Ernst, Justus Kuhn, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2003-04-29 |
| 6459649 | Address generator for generating addresses for an on-chip trim circuit | Wolfgang Anton Spirkl | 2002-10-01 |
| 6400630 | Circuit configuration having a variable number of data outputs and device for reading out data from the circuit configuration with the variable number of data outputs | — | 2002-06-04 |
| 6313655 | Semiconductor component and method for testing and operating a semiconductor component | — | 2001-11-06 |