Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7307895 | Self test for the phase angle of the data read clock signal DQS | Wolfgang Anton Spirkl | 2007-12-11 |
| 7117404 | Test circuit for testing a synchronous memory circuit | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Peter Poechmüller, Jochen Mueller +1 more | 2006-10-03 |
| 7117403 | Method and device for generating digital signal patterns | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2006-10-03 |
| 7062690 | System for testing fast synchronous digital circuits, particularly semiconductor memory chips | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2006-06-13 |
| 7043653 | Method and apparatus for synchronous signal transmission between at least two logic or memory components | Hermann Ruckerbauer, Frank Thiele | 2006-05-09 |
| 6957373 | Address generator for generating addresses for testing a circuit | Wolfgang Ernst, Jens Luepke, Peter Poechmüller, Gunnar Krause, Jochen Mueller +1 more | 2005-10-18 |
| 6954871 | Method of matching different signal propagation times between a controller and at least two processing units, and a computer system | — | 2005-10-11 |
| 6910161 | Device and method for reducing the number of addresses of faulty memory cells | Peter Weitz | 2005-06-21 |
| 6871306 | Method and device for reading and for checking the time position of data response signals read out from a memory module to be tested | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-03-22 |
| 6865707 | Test data generator | Wolfgang Ernst, Gunnar Krause, Jens Luepke, Jochen Mueller, Peter Poechmueller +1 more | 2005-03-08 |
| 6862702 | Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-03-01 |
| 6853206 | Method and probe card configuration for testing a plurality of integrated circuits in parallel | Michael Hübner, Gunnar Krause, Jochen Müller, Peter P{hacek over (o)}chmüller, Jürgen Weidenhöfer | 2005-02-08 |
| 6839397 | Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-01-04 |
| 6762611 | Test configuration and test method for testing a plurality of integrated circuits in parallel | Michael Hübner, Gunnar Krause, Jochen Müller, Peter Pöchmüller, Jürgen Weidenhöfer | 2004-07-13 |
| 6744272 | Test circuit | Wolfgang Ernst, Gunnar Krause, Jens Luepke, Jochen Mueller, Peter Poechmueller +1 more | 2004-06-01 |
| 6721904 | System for testing fast integrated digital circuits, in particular semiconductor memory modules | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2004-04-13 |
| 6618305 | Test circuit for testing a circuit | Wolfgang Ernst, Gunnar Krause, Peter Poechmueller, Jens Luepke, Jochen Mueller +1 more | 2003-09-09 |
| 6556492 | System for testing fast synchronous semiconductor circuits | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2003-04-29 |
| 6515319 | Field-effect-controlled transistor and method for fabricating the transistor | Dietrich Widmann, Armin Wieder, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2003-02-04 |