Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8863044 | Layout assessment method and system | Nathalie Casati, Frank De Morsier, Virginia Estellers Casas, Maria Gabrani | 2014-10-14 |
| 8751980 | Automatic wafer data sample planning and review | Nathalie Casati, Maria Gabrani, Ronald P. Luijten | 2014-06-10 |
| 8667427 | Method of optimization of a manufacturing process of an integrated circuit layout | Maria Gabrani, Ekaterina Volkova | 2014-03-04 |
| 8661370 | Optimization of a manufacturing process of an integrated circuit layout | Maria Gabrani, Ekaterina Volkova | 2014-02-25 |
| 8234603 | Method for fast estimation of lithographic binding patterns in an integrated circuit layout | Saeed Bagheri, Maria Gabrani, David O. Melville, Alan E. Rosenbluth, Kehan Tian | 2012-07-31 |
| 8201132 | System and method for testing pattern sensitive algorithms for semiconductor design | Timothy G. Dunham, William C. Leipold, Daniel N. Maynard, Michael E. Scaman, Shi Zhong | 2012-06-12 |
| 7685544 | Testing pattern sensitive algorithms for semiconductor design | Timothy G. Dunham, William C. Leipold, Daniel N. Maynard, Michael E. Scaman, Shi Zhong | 2010-03-23 |
| 7552417 | System for search and analysis of systematic defects in integrated circuits | Bette L. Bergman Reuter, Mark A. Lavin, William C. Leipold, Daniel N. Maynard, Maharaj Mukherjee | 2009-06-23 |
| 7415695 | System for search and analysis of systematic defects in integrated circuits | Bette L. Bergman Reuter, Mark A. Lavin, William C. Leipold, Daniel N. Maynard, Maharaj Mukherjee | 2008-08-19 |
| 7404174 | method for generating a set of test patterns for an optical proximity correction algorithm | Mark A. Lavin, William C. Leipold, Daniel N. Maynard, Maharaj Mukherjee | 2008-07-22 |
| 7353472 | System and method for testing pattern sensitive algorithms for semiconductor design | Timothy G. Dunham, William C. Leipold, Daniel N. Maynard, Michael E. Scaman, Shi Zhong | 2008-04-01 |
| 7284230 | System for search and analysis of systematic defects in integrated circuits | Bette L. Bergman Reuter, Mark A. Lavin, William C. Leipold, Daniel N. Maynard, Maharaj Mukherjee | 2007-10-16 |