Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406118 | System and method for managing serial lanes in a multi-user emulation system | Barton L. Quayle, Choshu Ito | 2025-09-02 |
| 12141081 | Training and operations with a double buffered memory topology | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2024-11-12 |
| 12099454 | Memory appliance couplings and operations | Vlad Fruchter, Keith Lowery, George Michael Uhler, Steven C. Woo, Ronald Lee | 2024-09-24 |
| 11907139 | Memory system design using buffer(s) on a mother board | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2024-02-20 |
| 11768780 | Training and operations with a double buffered memory topology | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2023-09-26 |
| 11537540 | Memory system design using buffer(s) on a mother board | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2022-12-27 |
| 11294830 | Training and operations with a double buffered memory topology | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2022-04-05 |
| 11210240 | Memory appliance couplings and operations | Vlad Fruchter, Keith Lowery, George Michael Uhler, Steven C. Woo, Ronald Lee | 2021-12-28 |
| 11003601 | Memory system design using buffer(s) on a mother board | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2021-05-11 |
| 10614002 | Memory system design using buffer(S) on a mother board | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2020-04-07 |
| 10613995 | Training and operations with a double buffered memory topology | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2020-04-07 |
| 10437747 | Memory appliance couplings and operations | Vlad Fruchter, Keith Lowery, George Michael Uhler, Steven C. Woo, Ronald Lee | 2019-10-08 |
| 10255220 | Dynamic termination scheme for memory communication | David A. Secker, Ravindranath Kollipara, Shajith Musaliar Sirajudeen, Yoshie Nakabayashi | 2019-04-09 |
| 10169258 | Memory system design using buffer(s) on a mother board | Yoshie Nakabayashi, Thomas J. Giovannini, Henry Stracovsky | 2019-01-01 |
| 9921751 | Methods and systems for mapping a peripheral function onto a legacy memory interface | Richard E. Perego, Pradeep Batra, Steven C. Woo, Lawrence Lai | 2018-03-20 |
| 9880971 | Memory appliance for accessing memory | Keith Lowery, Vlad Fruchter | 2018-01-30 |
| 9841791 | Circuit board assembly configuration | Donald R. Mullen, David A. Secker | 2017-12-12 |
| 9824779 | Memory error repair | Frederick A. Ware, Vlad Fruchter | 2017-11-21 |
| 9275733 | Methods and systems for mapping a peripheral function onto a legacy memory interface | Richard E. Perego, Pradeep Batra, Steven C. Woo, Lawrence Lai | 2016-03-01 |
| 9043513 | Methods and systems for mapping a peripheral function onto a legacy memory interface | Richard E. Perego, Pradeep Batra, Steven C. Woo, Lawrence Lai | 2015-05-26 |
| 8922245 | Power saving driver design | Kyung Suk Oh, David A. Secker | 2014-12-30 |