Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12141081 | Training and operations with a double buffered memory topology | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2024-11-12 |
| 11907139 | Memory system design using buffer(s) on a mother board | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2024-02-20 |
| 11768780 | Training and operations with a double buffered memory topology | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2023-09-26 |
| 11537540 | Memory system design using buffer(s) on a mother board | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2022-12-27 |
| 11294830 | Training and operations with a double buffered memory topology | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2022-04-05 |
| 11003601 | Memory system design using buffer(s) on a mother board | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2021-05-11 |
| 10613995 | Training and operations with a double buffered memory topology | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2020-04-07 |
| 10614002 | Memory system design using buffer(S) on a mother board | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2020-04-07 |
| 10255220 | Dynamic termination scheme for memory communication | Chi-Ming Yeung, David A. Secker, Ravindranath Kollipara, Shajith Musaliar Sirajudeen | 2019-04-09 |
| 10169258 | Memory system design using buffer(s) on a mother board | Chi-Ming Yeung, Thomas J. Giovannini, Henry Stracovsky | 2019-01-01 |