Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12396124 | Fan module interconnect apparatus for electronic devices | Khai Ern See, Chin Kung GOH, Twan Sing Loo | 2025-08-19 |
| 12156331 | Technologies for power tunnels on circuit boards | Khai Ern See, Jia Lin Liew, Tin Poay Chuah, Yi How Ooi | 2024-11-26 |
| 11445608 | Chassis interconnect for an electronic device | Eng Huat Goh, Jon Sern Lim, Khai Ern See, Min Suet Lim, Tin Poay Chuah +1 more | 2022-09-13 |
| 7695189 | System to calibrate on-die temperature sensor | Jed Griffin, Kifah M. Muraweh | 2010-04-13 |
| 7417448 | System to calibrate on-die temperature sensor | Jed Griffin, Kifah M. Muraweh | 2008-08-26 |
| 7257756 | Digital frequency synthesis clocked circuits | Neal Wolff | 2007-08-14 |
| 7199624 | Phase locked loop system capable of deskewing | Keng L. Wong, Gregory F. Taylor | 2007-04-03 |
| 7197659 | Global I/O timing adjustment using calibrated delay elements | Keng L. Wong, Songmin Kim | 2007-03-27 |
| 7184503 | Multi-loop circuit capable of providing a delayed clock in phase locked loops | Keng L. Wong | 2007-02-27 |
| 7100060 | Techniques for utilization of asymmetric secondary processing resources | Zhong-Ning Cai | 2006-08-29 |
| 7023945 | Method and apparatus for jitter reduction in phase locked loops | Keng L. Wong | 2006-04-04 |
| 6937075 | Method and apparatus for reducing lock time in dual charge-pump phase-locked loops | Keng L. Wong, Rachael Parker | 2005-08-30 |
| 6924710 | Voltage ID based frequency control for clock generating circuit | Keng L. Wong, Hong-Piao Ma, Greg Taylor, Robert Greiner, Edward A. Burton +1 more | 2005-08-02 |
| 6919769 | Method and apparatus for fast lock acquisition in self-biased phase locked loops | Keng L. Wong | 2005-07-19 |
| 6842056 | Cascaded phase-locked loops | Keng L. Wong, Cangsang Zhao | 2005-01-11 |
| 6809606 | Voltage ID based frequency control for clock generating circuit | Keng L. Wong, Hong-Piao Ma, Greg Taylor, Robert Greiner, Edward A. Burton +1 more | 2004-10-26 |
| 6771134 | Frequency control for clock generating circuit | Keng L. Wong, Hong-Piao Ma, Greg Taylor, Edward A. Burton | 2004-08-03 |
| 6756810 | Apparatus and method to provide a single reference component for multiple circuit compensation using digital impedance code shifting | Usman Mughal, Razi Uddin, Steven Peterson | 2004-06-29 |
| 6748549 | Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clock | Chi-Yeu Chao, Keng L. Wong, Songmin Kim, Gregory F. Taylor | 2004-06-08 |
| 6717455 | Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation | Usman Mughal, Razi Uddin, Songmin Kim, Gregory F. Taylor | 2004-04-06 |
| 6614317 | Variable lock window for a phase locked loop | Keng L. Wong, Usman Mughal, Masud Kamal, Kent R. Callahan | 2003-09-02 |
| 6545522 | Apparatus and method to provide a single reference component for multiple circuit compensation using digital impedance code shifting | Usman Mughal, Razi Uddin, Steven Peterson | 2003-04-08 |
| 6535047 | Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation | Usman Mughal, Razi Uddin, Songmin Kim, Gregory F. Taylor | 2003-03-18 |
| 6522165 | Bus termination scheme for flexible uni-processor and dual processor platforms | Vijayalakshmi Ramachandran, Usman Mughal | 2003-02-18 |
| 6509780 | Circuit compensation technique | Usman Mughal | 2003-01-21 |