Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12432922 | Method and apparatus to mitigate word line staircase etch stop layer thickness variations in 3D NAND devices | Sha Tao, Qun Li | 2025-09-30 |
| 7242261 | Voltage control for clock generating circuit | Keng L. Wong, Greg Taylor | 2007-07-10 |
| 6985041 | Clock generating circuit and method | Keng L. Wong, Niraj Bindal, George L. Geannopoulos, Greg Taylor, Edward A. Burton | 2006-01-10 |
| 6924710 | Voltage ID based frequency control for clock generating circuit | Keng L. Wong, Greg Taylor, Chee How Lim, Robert Greiner, Edward A. Burton +1 more | 2005-08-02 |
| 6914785 | Variable electronic circuit component | Alexander H. Slocum, Jeffrey H. Lang, James White, Xueen Yang | 2005-07-05 |
| 6809606 | Voltage ID based frequency control for clock generating circuit | Keng L. Wong, Greg Taylor, Chee How Lim, Robert Greiner, Edward A. Burton +1 more | 2004-10-26 |
| 6778033 | Voltage control for clock generating circuit | Keng L. Wong, Greg Taylor | 2004-08-17 |
| 6771134 | Frequency control for clock generating circuit | Keng L. Wong, Greg Taylor, Chee How Lim, Edward A. Burton | 2004-08-03 |