CA

Cedric Denis Robert Airaud

NV NVIDIA: 43 patents #93 of 7,811Top 2%
Overall (All Time): #69,093 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 25 most recent of 43 patents

Patent #TitleCo-InventorsDate
12360767 Data processing apparatus, method and virtual machine Michael Jean Sole 2025-07-15
12340216 Control of instruction issue based on issue groups Xiaoyang Shen, Scott Ryan Tancock, Zichao XIE, Shun Wan 2025-06-24
12292834 Cache prefetching Vladimir Vasekin, Vincent Rezard, Antony John Penton 2025-05-06
12236241 Data processing apparatus with selectively delayed transmission of operands Xiaoyang Shen, Zichao XIE, Grégorie Martin 2025-02-25
12141069 Prefetch store filtering Luca MARONCELLI, Florent Begon, Peter Raphael Eid 2024-11-12
12112169 Register freeing latency Luca NASSI, Geoffray Matthieu Lacourba, Albin Pierrick Tonnerre 2024-10-08
12099846 Shared unit instruction execution Frederic Claude Marie Piry, Natalya Bondarenko, Luca MARONCELLI, Geoffray Matthieu Lacourba 2024-09-24
12045618 Data processing apparatus and method for generating prefetches based on a nested prefetch pattern Natalya Bondarenko, Stefano GHIGGINI, Geoffray Matthieu Lacourba 2024-07-23
11907722 Methods and apparatus for storing prefetch metadata Luca MARONCELLI, Harvin Iriawan, Peter Raphael Eid 2024-02-20
11580032 Technique for training a prediction apparatus Frederic Claude Marie Piry, Natalya Bondarenko, Geoffray Matthieu Lacourba 2023-02-14
11537522 Determining a tag value for use in a tag-guarded memory Xiaoyang Shen, Yohann Rabefarihy, Rémi Marius Teyssier 2022-12-27
11531547 Data processing Damian Maiorano, Luca NASSI, Christophe Laurent Carbonne, Jocelyn Francois Orion Jaubert, Pasquale Ranone 2022-12-20
11157277 Data processing apparatus with respective banked registers for exception levels Albin Pierrick Tonnerre, Luca NASSI, Rémi Marius Teyssier 2021-10-26
11132202 Cache control circuitry and methods Luca NASSI, Rémi Marius Teyssier, Albin Pierrick Tonnerre, François Donati, Christophe Laurent Carbonne +1 more 2021-09-28
11113028 Apparatus and method for performing an index operation Xiaoyang Shen, David Raymond Lutz 2021-09-07
11036511 Processing of a temporary-register-using instruction including determining whether to process a register move micro-operation for transferring data from a first register file to a second register file based on whether a temporary variable is still available in the second register file Xiaoyang Shen, Damien Robin Martin, Luca NASSI, François Donati 2021-06-15
11010159 Bit processing involving bit-level permutation instructions or operations Xiaoyang Shen, Luca NASSI, Damien Robin Martin 2021-05-18
10846098 Execution pipeline adaptation Luca NASSI, Damien Robin Martin, Xiaoyang Shen 2020-11-24
10725964 Dynamic SIMD instruction issue target selection Luca NASSI, Damien Robin Martin, Xiaoyang Shen 2020-07-28
10635445 Handling modifications to permitted program counter ranges in a data processing apparatus Rémi Marius Teyssier, Albin Pierrick Tonnerre, Luca NASSI, Guillaume Bolbenes, François Donati +2 more 2020-04-28
10558462 Apparatus and method for storing source operands for operations Luca NASSI, Rémi Marius Teyssier, Albin Pierrick Tonnerre 2020-02-11
10545764 Available register control for register renaming Luca Scalabrino, Frederic Jean Denis Arsanto, Thomas Gilles Tarridec 2020-01-28
10310735 Data storage Max John Batley, Ian Michael Caulfield, Thomas Edward Roberts 2019-06-04
10198267 Register renaming using snapshot buffers Luca Scalabrino, Frederic Jean Denis Arsanto, Thomas Gilles Tarridec 2019-02-05
10042640 Processing queue management Luca Scalabrino, Frederic Jean Denis Arsanto, Thomas Gilles Tarridec 2018-08-07