BB

Brent R. Boswell

IN Intel: 14 patents #2,910 of 30,777Top 10%
NV NVIDIA: 8 patents #909 of 7,811Top 15%
Overall (All Time): #189,828 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12321743 Generalized acceleration of matrix multiply accumulate operations Ming Y. Siu, Jack Choquette, Jonah M. Alben, Stuart F. Oberman 2025-06-03
11816482 Generalized acceleration of matrix multiply accumulate operations Ming Y. Siu, Jack Choquette, Jonah M. Alben, Stuart F. Oberman 2023-11-14
11816481 Generalized acceleration of matrix multiply accumulate operations Ming Y. Siu, Jack Choquette, Jonah M. Alben, Stuart F. Oberman 2023-11-14
11797303 Generalized acceleration of matrix multiply accumulate operations Ming Y. Siu, Jack Choquette, Jonah M. Alben, Stuart F. Oberman 2023-10-24
11797301 Generalized acceleration of matrix multiply accumulate operations Ming Y. Siu, Jack Choquette, Jonah M. Alben, Stuart F. Oberman 2023-10-24
11797302 Generalized acceleration of matrix multiply accumulate operations Ming Y. Siu, Jack Choquette, Jonah M. Alben, Stuart F. Oberman 2023-10-24
10884734 Generalized acceleration of matrix multiply accumulate operations Ming Y. Siu, Jack Choquette, Jonah M. Alben, Stuart F. Oberman 2021-01-05
10338919 Generalized acceleration of matrix multiply accumulate operations Ming Y. Siu, Jack Choquette, Jonah M. Alben, Stuart F. Oberman 2019-07-02
10296338 System, apparatus and method for low overhead control transfer to alternate address space in a processor Banu Meenakshi Nagasundaram, Michael D. Abbott, Srikanth Dakshinamoorthy, Jason Howard, Joshua B. Fryman 2019-05-21
10282341 Method, apparatus and system for configuring a protocol stack of an integrated circuit chip Bryan L. Spry, Marcus W. Song, Deepak Rangaraj, Avinash N. Ananthakrishnan, Robert J. Hayes +2 more 2019-05-07
9734116 Method, apparatus and system for configuring a protocol stack of an integrated circuit chip Bryan L. Spry, Marcus W. Song, Deepak Rangaraj, Avinash N. Ananthakrishnan, Robert J. Hayes +2 more 2017-08-15
8918446 Reducing power consumption in multi-precision floating point multipliers Thierry Pons, Tom Aviram 2014-12-23
8913740 Method and apparatus for generating an Advanced Encryption Standard (AES) key schedule Shay Gueron, Martin G. Dixon, Srinivas Chennupaty, Mayank Bomb 2014-12-16
8787565 Method and apparatus for generating an advanced encryption standard (AES) key schedule Shay Gueron, Martin G. Dixon, Srinivas Chennupaty, Mayank Bomb 2014-07-22
8189792 Method and apparatus for performing cryptographic operations Kirk S. Yap, Gilbert M. Wolrich, Wajdi K. Feghali, Vinodh Gopal, Srinivas Chennupaty +1 more 2012-05-29
7366881 Method and apparatus for staggering execution of an instruction Patrice Roussel, Glenn J. Hinton, Shreekant S. Thakkar, Karol F. Menezes 2008-04-29
6925553 Staggering execution of a single packed data instruction using the same circuit Patrice Roussel, Glenn J. Hinton, Shreekant S. Thakkar, Karol F. Menezes 2005-08-02
6694426 Method and apparatus for staggering execution of a single packed data instruction using the same circuit Patrice Roussel, Glenn J. Hinton, Shreekant S. Thakkar, Karol F. Menezes 2004-02-17
6687810 Method and apparatus for staggering execution of a single packed data instruction using the same circuit Patrice Roussel, Glenn J. Hinton, Shreekant S. Thakkar, Karol F. Menezes 2004-02-03
6425073 Method and apparatus for staggering execution of an instruction Patrice Roussel, Glenn J. Hinton, Shreekant S. Thakkar, Karol F. Menezes 2002-07-23
6230257 Method and apparatus for staggering execution of a single packed data instruction using the same circuit Patrice Roussel, Glenn J. Hinton, Shreekant S. Thakkar, Karol F. Menezes 2001-05-08
6055555 Interface for performing parallel arithmetic and round operations Karol F. Menezes 2000-04-25