JA

Jonah M. Alben

NV NVIDIA: 77 patents #23 of 7,811Top 1%
Overall (All Time): #24,243 of 4,157,543Top 1%
77
Patents All Time

Issued Patents All Time

Showing 25 most recent of 77 patents

Patent #TitleCo-InventorsDate
12321743 Generalized acceleration of matrix multiply accumulate operations Brent R. Boswell, Ming Y. Siu, Jack Choquette, Stuart F. Oberman 2025-06-03
12306691 Techniques to power balance multiple chips Benjamin D. Faulkner, Tao Li, Mini Rawat, Divya Ramakrishnan, Swanand Santosh Bindoo +1 more 2025-05-20
12124346 Leveraging low power states for fault testing of processing cores at runtime Sachin Satish Idgunji, Jue Wu, Shantanu Sarangi 2024-10-22
11954518 User-defined metered priority queues Jonathon Stuart Ramsey Evans, Lacky V. Shah, Phil Johnson, Brian Pharris, Greg Palmer +1 more 2024-04-09
11842280 Loss-scaling for deep neural network training with reduced precision Paulius Micikevicius, Hao Wu 2023-12-12
11816481 Generalized acceleration of matrix multiply accumulate operations Brent R. Boswell, Ming Y. Siu, Jack Choquette, Stuart F. Oberman 2023-11-14
11816482 Generalized acceleration of matrix multiply accumulate operations Brent R. Boswell, Ming Y. Siu, Jack Choquette, Stuart F. Oberman 2023-11-14
11797301 Generalized acceleration of matrix multiply accumulate operations Brent R. Boswell, Ming Y. Siu, Jack Choquette, Stuart F. Oberman 2023-10-24
11797302 Generalized acceleration of matrix multiply accumulate operations Brent R. Boswell, Ming Y. Siu, Jack Choquette, Stuart F. Oberman 2023-10-24
11797303 Generalized acceleration of matrix multiply accumulate operations Brent R. Boswell, Ming Y. Siu, Jack Choquette, Stuart F. Oberman 2023-10-24
11669421 Fault injection architecture for resilient GPU computing Sachin Satish Idgunji, Jue Wu 2023-06-06
11573872 Leveraging low power states for fault testing of processing cores at runtime Sachin Satish Idgunji, Jue Wu, Shantanu Sarangi 2023-02-07
11275662 Fault injection architecture for resilient GPU computing Sachin Satish Idgunji, Jue Wu 2022-03-15
11204849 Leveraging low power states for fault testing of processing cores at runtime Sachin Satish Idgunji, Jue Wu, Shantanu Sarangi 2021-12-21
10957078 Enhanced anti-aliasing by varying sample patterns spatially and/or temporally Yury Uralsky, Ankan Banerjee, Gregory Massal, Thomas A. Petersen, Oleg Kuznetsov +2 more 2021-03-23
10922203 Fault injection architecture for resilient GPU computing Sachin Satish Idgunji, Jue Wu 2021-02-16
10884734 Generalized acceleration of matrix multiply accumulate operations Brent R. Boswell, Ming Y. Siu, Jack Choquette, Stuart F. Oberman 2021-01-05
10684824 Stochastic rounding of numerical values Paulius Micikevicius, Hao Wu, Ming Y. Siu 2020-06-16
10430989 Multi-pass rendering in a screen space pipeline Ziyad S. Hakura, Cynthia Ann Edgeworth Allison, Dale L. Kirkland, Jeffrey A. Bolz, Yury Uralsky 2019-10-01
10338919 Generalized acceleration of matrix multiply accumulate operations Brent R. Boswell, Ming Y. Siu, Jack Choquette, Stuart F. Oberman 2019-07-02
10147222 Multi-pass rendering in a screen space pipeline Ziyad S. Hakura, Cynthia Ann Edgeworth Allison, Dale L. Kirkland, Jeffrey A. Bolz, Yury Uralsky 2018-12-04
10147203 Enhanced anti-aliasing by varying sample patterns spatially and/or temporally Yury Uralsky, Ankan Banerjee, Gregory Massal, Thomas A. Petersen, Oleg Kuznetsov +2 more 2018-12-04
10102668 System, method, and computer program product for rendering at variable sampling rates using projective geometric distortion Henry Packard Moreton 2018-10-16
10096086 Enhanced anti-aliasing by varying sample patterns spatially and/or temporally Yury Uralsky, Ankan Banerjee, Gregory Massal, Thomas A. Petersen, Oleg Kuznetsov +2 more 2018-10-09
9829967 Techniques for limiting power via secondary control of a voltage regulator Sam Duell, Andrew Bell, Ming Chen, Gabriele Gorla, Qi Lin +2 more 2017-11-28