Issued Patents All Time
Showing 26–50 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9170980 | Ground-referenced single-ended signaling connected graphics processing unit multi-chip module | William J. Dally, John W. Poulton, Thomas Hastings Greer, III | 2015-10-27 |
| 9164766 | System and method for hardware assisted stack | Aron L. Wong, Dennis Ma, Mark Krueger, Jeffrey J. Irwin | 2015-10-20 |
| 9153539 | Ground-referenced single-ended signaling connected graphics processing unit multi-chip module | William J. Dally, John W. Poulton, Thomas Hastings Greer, III | 2015-10-06 |
| 9077329 | Latch circuit with a bridging device | Ilyas Elkin, William J. Dally | 2015-07-07 |
| 8890573 | Clock gating latch, method of operation thereof and integrated circuit employing the same | Ilyas Elkin, Ge Yang | 2014-11-18 |
| 8786345 | Single-trigger low-energy flip-flop circuit | William J. Dally | 2014-07-22 |
| 8782349 | System and method for maintaining cache coherency across a serial interface bus using a snoop request and complete message | Brian K. Langendorf, David B. Glasco, Michael Brian Cox | 2014-07-15 |
| 8742796 | Low energy flip-flops | William J. Dally | 2014-06-03 |
| 8707081 | Memory clock slowdown | Sean J. Treichler, Adam E. Levinthal | 2014-04-22 |
| 8659337 | Latch circuit with a bridging device | Ilyas Elkin, William J. Dally | 2014-02-25 |
| 8604855 | Dual-trigger low-energy flip-flop circuit | William J. Dally, John W. Poulton, Ge Yang | 2013-12-10 |
| 8489839 | Increasing memory capacity of a frame buffer via a memory splitter chip | Ashish Karandikar, Kaustubh Sanghani, Shane J. Keil | 2013-07-16 |
| 8487681 | Dual-trigger low-energy flip-flop circuit | William J. Dally, John W. Poulton, G E (Francis) Yang | 2013-07-16 |
| 8436669 | Single-trigger low-energy flip-flop circuit | William J. Dally | 2013-05-07 |
| 8436866 | Inter-frame texel cache | — | 2013-05-07 |
| 8234458 | System and method for maintaining cache coherency across a serial interface bus using a snoop request and complete message | Brian K. Langendorf, David B. Glasco, Michael Brian Cox | 2012-07-31 |
| 8203562 | Apparatus, system, and method for distributing work to integrated heterogeneous processors | Stephen D. Lew, Paolo E. Sabella | 2012-06-19 |
| 8194085 | Apparatus, system, and method for graphics memory hub | Joseph Greco, Barry A. Wagner, Anthony Michael Tamasi | 2012-06-05 |
| 7958483 | Clock throttling based on activity-level signals | Robert J. Hasslen, III, Sean J. Treichler | 2011-06-07 |
| 7903123 | System for programmable dithering of video data | Stephen D. Lew | 2011-03-08 |
| 7898545 | Apparatus, system, and method for integrated heterogeneous processors | Stephen D. Lew, Paolo E. Sabella | 2011-03-01 |
| 7886164 | Processor temperature adjustment system and method | Kevin J. Kranzusch | 2011-02-08 |
| 7847802 | Apparatus, method, and system for coalesced Z data and color data for raster operations | Donald A. Bittel, Dorcas T. Hsia, David Kirk McAllister | 2010-12-07 |
| 7849332 | Processor voltage adjustment system and method | Kevin J. Kranzusch | 2010-12-07 |
| 7836318 | Memory clock slowdown | Sean J. Treichler, Adam E. Levinthal | 2010-11-16 |