IE

Ilyas Elkin

NV NVIDIA: 17 patents #374 of 7,811Top 5%
Oracle: 4 patents #3,141 of 14,854Top 25%
Overall (All Time): #202,807 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12387028 Data path circuit design using reinforcement learning Rajarshi Roy, Saad Godil, Jonathan Raiman, Neel Kant, Ming Y. Siu +3 more 2025-08-12
11294631 Full adder cell with improved power efficiency Ge Yang, Xi Zhang 2022-04-05
11169779 Full adder cell with improved power efficiency Ge Yang, Xi Zhang 2021-11-09
10931266 Low power flip-flop element with gated clock Ge Yang, Xi Zhang, Jiani Yu 2021-02-23
10466968 Radix-4 multiplier partial product generation with improved area and power 2019-11-05
10120028 Efficient scan latch systems and methods Ge Yang 2018-11-06
9667230 Latch and flip-flop circuits with shared clock-enabled supply nodes Matthew Rudolph Fojtik, Yanqing Zhang 2017-05-30
9496853 Via resistance analysis systems and methods Wojciech Jakub Poppe, Puneet Gupta 2016-11-15
9448125 Determining on-chip voltage and temperature Abhishek Ranjan Singh, Wojciech Jakub Poppe 2016-09-20
9435861 Efficient scan latch systems and methods Ge Yang 2016-09-06
9438213 Low power master-slave flip-flop Ge Yang 2016-09-06
9425772 Coupling resistance and capacitance analysis systems and methods Wojciech Jakub Poppe, Puneet Gupta 2016-08-23
9077329 Latch circuit with a bridging device William J. Dally, Jonah M. Alben 2015-07-07
9071233 Low power master-slave flip-flop Ge Yang 2015-06-30
8952705 System and method for examining asymetric operations Wojciech Jakub Poppe 2015-02-10
8890573 Clock gating latch, method of operation thereof and integrated circuit employing the same Ge Yang, Jonah M. Alben 2014-11-18
8659337 Latch circuit with a bridging device William J. Dally, Jonah M. Alben 2014-02-25
8035425 Active echo on-die repeater circuit Robert P. Masleid 2011-10-11
7890826 Method and apparatus for test of asynchronous pipelines Ishwardutt Parulkar, Josephus C. Ebergen 2011-02-15
7629815 Low-power semi-dynamic flip-flop with smart keeper Bo Tang, Georgios Konstadinidis 2009-12-08
7164302 One gate delay output noise insensitive latch 2007-01-16