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High density integrated circuit packaging with chip stacking and via interconnections |
Michael A. Gaynes, Viswanadham Puligandla, Charles G. Woychik, Jerzy M. Zalesinski |
2001-05-22 |
| 6187678 |
High density integrated circuit packaging with chip stacking and via interconnections |
Michael A. Gaynes, Viswanadham Puligandla, Charles G. Woychik, Jerzy M. Zalesinski |
2001-02-13 |
| 6002177 |
High density integrated circuit packaging with chip stacking and via interconnections |
Michael A. Gaynes, Viswanadham Puligandla, Charles G. Woychik, Jerzy M. Zalesinski |
1999-12-14 |
| 5567984 |
Process for fabricating an electronic circuit package |
Jerzy M. Zalesinski |
1996-10-22 |
| 5145104 |
Substrate soldering in a reducing atmosphere |
Joseph A. Apap, Mark Alan Brown, Thomas L. Miller, James Murray, David W. Sissenstein, Jr. |
1992-09-08 |
| 5050296 |
Affixing pluggable pins to a ceramic substrate |
Eugene L. Marsh, Thomas L. Miller, Jerzy M. Zalesinski |
1991-09-24 |
| 4919729 |
Solder paste for use in a reducing atmosphere |
Peter J. Elmgren, Dennis L. Rivenburg, Sr., Mukund Kantilal Saraiya, David W. Sissenstein, Jr. |
1990-04-24 |
| 4869418 |
Solder leveling method and apparatus |
John P. Simpson, Gary L. Newman, James M. Larnerd |
1989-09-26 |
| 4799616 |
Solder leveling method and apparatus |
John P. Simpson, Gary L. Newman, James M. Larnerd |
1989-01-24 |
| 4676426 |
Solder leveling technique |
Russell E. Darrow, John D. Larnerd |
1987-06-30 |
