Issued Patents All Time
Showing 51–75 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9037885 | Independent power control of processing cores | Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby | 2015-05-19 |
| 9037840 | Mechanism to provide workload and configuration-aware deterministic performance for microprocessors | Ankush Varma, Krishnakanth V. Sistla, Martin T. Rowland, Chris Poirier, Eric J. Dehaemer +9 more | 2015-05-19 |
| 9032232 | Instruction for enabling a processor wait state | Martin G. Dixon, Scott Dion Rodgers, Taraneh Bahrami, Prashant Sethi, Per Hammarlund | 2015-05-12 |
| 9021279 | Independent power control of processing cores | Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby | 2015-04-28 |
| 9003210 | Dynamic voltage transitions | Robert Greiner, Xia Dai, Hung-Piao Ma | 2015-04-07 |
| 8996899 | Independent power control of processing cores | Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby | 2015-03-31 |
| 8990597 | Instruction for enabling a processor wait state | Martin G. Dixon, Scott Dion Rodgers, Taraneh Bahrami, Prashant Sethi, Per Hammarlund | 2015-03-24 |
| 8949635 | Integrated circuit performance improvement across a range of operating conditions and physical constraints | Stephan Jourdan, Robert Greiner, Edward A. Burton, Anant Deval, Michael Cornaby +2 more | 2015-02-03 |
| 8935546 | Dynamic voltage transitions | Robert Greiner, Xia Dia, Hung-Piao Ma | 2015-01-13 |
| 8892861 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Varghese George, Sanjeev Jahagirdar | 2014-11-18 |
| 8879346 | Mechanisms for enabling power management of embedded dynamic random access memory on a semiconductor integrated circuit package | Timothy Y. Kam, Jay D. Schwartz, Seongwoo Kim | 2014-11-04 |
| 8856568 | Independent power control of processing cores | Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby | 2014-10-07 |
| 8850178 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Varghese George, Sanjeev Jahagirdar | 2014-09-30 |
| 8719600 | Dynamic voltage transitions | Robert Greiner, Matthew M. Ma, Kevin Dai | 2014-05-06 |
| 8707064 | Dynamic voltage transitions | Robert Greiner, Matthew M. Ma, Kevin Dai | 2014-04-22 |
| 8611170 | Mechanisms for utilizing efficiency metrics to control embedded dynamic random access memory power states on a semiconductor integrated circuit package | Timothy Y. Kam, Jay D. Schwartz, Seongwoo Kim | 2013-12-17 |
| 8464035 | Instruction for enabling a processor wait state | Martin G. Dixon, Scott Dion Rodgers, Taraneh Bahrami, Prashant Sethi, Per Hammarlund | 2013-06-11 |
| 8397090 | Operating integrated circuit logic blocks at independent voltages with single voltage supply | Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Mike Cornaby | 2013-03-12 |
| 8131989 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Varghese George, Sanjeev Jahagirdar | 2012-03-06 |
| 8069358 | Independent power control of processing cores | Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby | 2011-11-29 |
| 7949887 | Independent power control of processing cores | Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby | 2011-05-24 |
| 7890781 | Dynamic voltage transitions | Robert Greiner, Matthew M. Ma, Kevin Dai | 2011-02-15 |
| 7444524 | Dynamic voltage transitions | Robert Greiner, Matthew M. Ma, Kevin Dai | 2008-10-28 |
| 7370189 | Method and apparatus for establishing safe processor operating points in connection with a secure boot | Stephen A. Fischer, Varghese George, Sanjeev Jahagirdar | 2008-05-06 |
| 7315952 | Power state coordination between devices sharing power-managed resources | Jeffrey R. Wilcox, Shivnandan Kaushik, Devadatta V. Bodas, Siva Ramakrishnan, David I. Poisner +1 more | 2008-01-01 |