Issued Patents All Time
Showing 51–75 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6762629 | VCC adaptive dynamically variable frequency clock system for high performance low power microprocessors | Stefan Rusu | 2004-07-13 |
| 6753541 | Method and apparatus for making and using a beacon fiducial for an integrated circuit | Steve Seidel, Valluri Rao, Stefan Rusu, Richard H. Livengood | 2004-06-22 |
| 6628146 | Comparator circuit and method | — | 2003-09-30 |
| 6608528 | Adaptive variable frequency clock system for high performance low power microprocessors | Stefan Rusu | 2003-08-19 |
| 6600349 | Waveform generator, display device and electronic apparatus | — | 2003-07-29 |
| 6548316 | Monolithic semiconductor device and method of manufacturing the same | Piero Migliorato | 2003-04-15 |
| 6201448 | Method and apparatus to reduce clock jitter of an on-chip clock signal | Stefan Rusu | 2001-03-13 |
| 6172937 | Multiple synthesizer based timing signal generation scheme | Alper Ilkbahar, Ian A. Young | 2001-01-09 |
| 6067656 | Method and apparatus for detecting soft errors in content addressable memory arrays | Stefan Rusu, John Fu | 2000-05-23 |
| 5815195 | Subscriber information maintenance system and methods | — | 1998-09-29 |
| 5268320 | Method of increasing the accuracy of an analog circuit employing floating gate memory devices | Mark A. Holler | 1993-12-07 |
| 5264734 | Difference calculating neural network utilizing switched capacitors | Mark A. Holler, Alan Kramer | 1993-11-23 |
| 5256911 | Neural network with multiplexed snyaptic processing | Mark A. Holler | 1993-10-26 |
| 5247606 | Adaptively setting analog weights in a neural network and the like | — | 1993-09-21 |
| 5146602 | Method of increasing the accuracy of an analog neural network and the like | Mark A. Holler | 1992-09-08 |
| 5087826 | Multi-layer neural network employing multiplexed output neurons | Mark A. Holler | 1992-02-11 |
| 5075869 | Neural network exhibiting improved tolerance to temperature and power supply variations | Mark A. Holler, Hernan A. Castro | 1991-12-24 |
| 5055897 | Semiconductor cell for neural network and the like | George R. Canepa, Mark A. Holler | 1991-10-08 |
| 4961002 | Synapse cell employing dual gate transistor structure | Mark A. Holler, Hernan A. Castro | 1990-10-02 |
| 4957877 | Process for simultaneously fabricating EEPROM cell and flash EPROM cell | Stefan Lai | 1990-09-18 |
| 4956564 | Adaptive synapse cell providing both excitatory and inhibitory connections in an associative network | Mark A. Holler, Hernan A. Castro | 1990-09-11 |
| 4950917 | Semiconductor cell for neural network employing a four-quadrant multiplier | Mark A. Holler, Ronald G. Benson, Hernan A. Castro | 1990-08-21 |
| 4949140 | EEPROM cell with integral select transistor | — | 1990-08-14 |
| 4814286 | EEPROM cell with integral select transistor | — | 1989-03-21 |
| 4806202 | Field enhanced tunnel oxide on treated substrates | Daniel Tang, Himanshu Choksi, Simon Wang | 1989-02-21 |