Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417319 | Multi-chip secure and programmable systems and methods | Srirama Chandra, Tim Vogt, Mamta Gupta | 2025-09-16 |
| 12237831 | Network-on-chip (NOC) with flexible data width | Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, James Ball, Kavitha Prasad +1 more | 2025-02-25 |
| 12204441 | Flushing cache lines involving persistent memory | Nagabhushan Chitlur, Harsha Gupta | 2025-01-21 |
| 11789883 | Inter-die communication of programmable logic devices | Dheeraj Subbareddy, Kavitha Prasad, Ankireddy Nalamalpu, Harsha Gupta | 2023-10-17 |
| 11700002 | Network-on-chip (NOC) with flexible data width | Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, James Ball, Kavitha Prasad +1 more | 2023-07-11 |
| 11342918 | Network-on-chip (NOC) with flexible data width | Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, James Ball, Kavitha Prasad +1 more | 2022-05-24 |
| 10790827 | Network-on-chip (NOC) with flexible data width | Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, James Ball, Kavitha Prasad +1 more | 2020-09-29 |
| 10649927 | Dual in-line memory module (DIMM) programmable accelerator card | Dheeraj Subbareddy, Kavitha Prasad, Ankireddy Nalamalpu, Harsha Gupta | 2020-05-12 |
| 9824772 | Hardware chip select training for memory using read commands | Venkata Ramana Malladi, Tony Yuhsiang Cheng, Ambuj Kumar, Arunjit Sahni, Paul Lam | 2017-11-21 |
| 9607714 | Hardware command training for memory using write leveling mechanism | Venkata Ramana Malladi, Tony Yuhsiang Cheng, Ambuj Kumar, Arunjit Sahni, Paul Lam | 2017-03-28 |
| 9378169 | Method and system for changing bus direction in memory systems | Ambuj Kumar, Brian K. Langendorf, Tony Yuhsiang Cheng | 2016-06-28 |
| 9368169 | Hardware chip select training for memory using write leveling mechanism | Venkata Ramana Malladi, Tony Yuhsiang Cheng, Ambuj Kumar, Arunjit Sahni, Paul Lam | 2016-06-14 |
| 7143304 | Method and apparatus for enhancing the speed of a synchronous bus | Kevin Normoyle, Christopher Furman | 2006-11-28 |