Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423009 | Concurrent write data strobe and reference voltage calibrations | Robert E. Jeter, Jingkui Zheng, David A. Knopf, Satish B. Dulam, Kai Lun Hsiung +1 more | 2025-09-23 |
| 12293808 | Memory subsystem calibration using substitute results | Robert E. Jeter, Rakesh L. Notani, Kai Lun Hsiung, Rahul Ranjan, Naveen Kumar Korada | 2025-05-06 |
| 11960739 | Nominal distance reference voltage calibration | Robert E. Jeter, Jingkui Zheng, David A. Knopf, Satish B. Dulam, Kai Lun Hsiung +1 more | 2024-04-16 |
| 11776597 | Memory subsystem calibration using substitute results | Robert E. Jeter, Rakesh L. Notani, Kai Lun Hsiung, Rahul Ranjan, Naveen Kumar Korada | 2023-10-03 |
| 11501820 | Selective reference voltage calibration in memory subsystem | Robert E. Jeter, Kai Lun Hsiung, Rakesh L. Notani, John H. Kelm, Taehyun Kim | 2022-11-15 |
| 11217285 | Memory subsystem calibration using substitute results | Robert E. Jeter, Rakesh L. Notani, Kai Lun Hsiung, Rahul Ranjan, Naveen Kumar Korada | 2022-01-04 |
| 10991403 | Memory calibration with end point replay | Robert E. Jeter, Rakesh L. Notani | 2021-04-27 |
| 10515028 | Reference voltage calibration using a qualified weighted average | Robert E. Jeter, Brijesh Tripathi, Kiran B. Kattel, Rakesh L. Notani, Fabien S. Faure +6 more | 2019-12-24 |
| 10175905 | Systems and methods for dynamically switching memory performance states | Robert E. Jeter, Liang Deng, Kai Lun Hsiung, Manu Gulati, Rakesh L. Notani +4 more | 2019-01-08 |
| 10019387 | Reference voltage calibration using a qualified weighted average | Robert E. Jeter, Brijesh Tripathi, Kiran B. Kattel, Rakesh L. Notani, Fabien S. Faure +6 more | 2018-07-10 |
| 9824772 | Hardware chip select training for memory using read commands | Tony Yuhsiang Cheng, Sharath Raghava, Ambuj Kumar, Arunjit Sahni, Paul Lam | 2017-11-21 |
| 9698797 | Hierarchical feedback-controlled oscillator techniques | Manu Gulati, Suhas Kumar Suvarna Ramesh, Thomas H. Huang, Rakesh L. Notani, Robert E. Jeter +1 more | 2017-07-04 |
| 9607714 | Hardware command training for memory using write leveling mechanism | Tony Yuhsiang Cheng, Sharath Raghava, Ambuj Kumar, Arunjit Sahni, Paul Lam | 2017-03-28 |
| 9368169 | Hardware chip select training for memory using write leveling mechanism | Tony Yuhsiang Cheng, Sharath Raghava, Ambuj Kumar, Arunjit Sahni, Paul Lam | 2016-06-14 |