Issued Patents All Time
Showing 25 most recent of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12413232 | Multi-purpose interface for configuration data and user fabric data | Kevin Clark, Scott J. Weber, Ravi Prakash Gutala, Aravind Raghavendra Dasu | 2025-09-09 |
| 12237831 | Network-on-chip (NOC) with flexible data width | Sharath Raghava, Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, Kavitha Prasad +1 more | 2025-02-25 |
| 11700002 | Network-on-chip (NOC) with flexible data width | Sharath Raghava, Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, Kavitha Prasad +1 more | 2023-07-11 |
| 11489527 | Three dimensional programmable logic circuit systems and methods | Scott J. Weber, Aravind Raghavendra Dasu, Ravi Prakash Gutala, Mahesh A. Iyer, Eriko Nurvitadhi +2 more | 2022-11-01 |
| 11424744 | Multi-purpose interface for configuration data and user fabric data | Kevin Clark, Scott J. Weber, Ravi Prakash Gutala, Aravind Raghavendra Dasu | 2022-08-23 |
| 11342918 | Network-on-chip (NOC) with flexible data width | Sharath Raghava, Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, Kavitha Prasad +1 more | 2022-05-24 |
| 11223361 | Interface for parallel configuration of programmable devices | Kevin Clark, Scott J. Weber, Simon Chong, Ravi Prakash Gutala, Aravind Raghavendra Dasu +1 more | 2022-01-11 |
| 10833679 | Multi-purpose interface for configuration data and user fabric data | Kevin Clark, Scott J. Weber, Ravi Prakash Gutala, Aravind Raghavendra Dasu | 2020-11-10 |
| 10790827 | Network-on-chip (NOC) with flexible data width | Sharath Raghava, Ankireddy Nalamalpu, Dheeraj Subbareddy, Harsha Gupta, Kavitha Prasad +1 more | 2020-09-29 |
| 10666265 | Interface for parallel configuration of programmable devices | Kevin Clark, Scott J. Weber, Simon Chong, Ravi Prakash Gutala, Aravind Raghavendra Dasu +1 more | 2020-05-26 |
| 9740488 | Processors operable to allow flexible instruction alignment | — | 2017-08-22 |
| 9588176 | Techniques for using scan storage circuits | Michael D. Hutton, Sean R. Atsatt, Dana How, Jeffrey Christopher Chromczak, Eng Ling Ho | 2017-03-07 |
| 9329847 | High-level language code sequence optimization for implementing programmable chip designs | Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, Philippe Molson, Jesse Kempa | 2016-05-03 |
| 9223743 | Multiplier operable to perform a variety of operations | James R. Lawson | 2015-12-29 |
| 8990474 | Logic device having a compressed configuration image stored on an internal read only memory | — | 2015-03-24 |
| 8874881 | Processors operable to allow flexible instruction alignment | — | 2014-10-28 |
| 8578356 | High-level language code sequence optimization for implementing programmable chip designs | Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, Philippe Molson, Jesse Kempa | 2013-11-05 |
| 8392674 | Embedded memory data transformation circuitry | — | 2013-03-05 |
| 8250542 | Method and apparatus for performing trace data compression | — | 2012-08-21 |
| 8135894 | Methods and systems for reducing interrupt latency by using a dedicated bit | — | 2012-03-13 |
| 8006071 | Processors operable to allow flexible instruction alignment | — | 2011-08-23 |
| 7873953 | High-level language code sequence optimization for implementing programmable chip designs | Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, Philippe Molson, Jesse Kempa | 2011-01-18 |
| D624397 | Latching and securing mechanism for image transfer wrap | Danny L. Gepford, Jr. | 2010-09-28 |
| 7720901 | Multiplier operable to perform a variety of operations | James R. Lawson | 2010-05-18 |
| 7627784 | Modular processor debug core connection for programmable chip systems | Timothy P. Allen, Sean R. Atsatt | 2009-12-01 |