Philippe Molson — 25 Patents at Intel

Philippe Molson has been granted 25 US patents while listed as an inventor at Intel. The first was granted in 2003 and the most recent in December 2020. Philippe Molson ranks #158,593 of 4,157,543 US inventors in our database (top 3.8%). Patent records list Philippe Molson in San Jose, CA, US.

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
10866278	Methods and apparatus for performing design for debug via protocol interface	—	2020-12-15	$39,832,000
9684615	Apparatus and methods for multiple-channel direct memory access	Harry Nguyen, Michael Chen	2017-06-20
9552323	High-speed peripheral component interconnect (PCIe) input-output devices with receive buffer management circuitry	Christopher D. Finan, Kenny Au, Cora Lynn Mau	2017-01-24
9329847	High-level language code sequence optimization for implementing programmable chip designs	Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, James Ball, Jesse Kempa	2016-05-03
9257987	Partial reconfiguration using configuration transaction layer packets	—	2016-02-09
9053093	Modular direct memory access system	Harry Nguyen, Christopher D. Finan	2015-06-09	$11,971,000
8661396	DSP design system level power estimation	Jordan Plofsky, Francois Pequillat	2014-02-25	$6,008,000
8578356	High-level language code sequence optimization for implementing programmable chip designs	Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, James Ball, Jesse Kempa	2013-11-05	$7,486,000
8402419	DSP design system level power estimation	Jordan Plofsky, Francois Pequillat	2013-03-19	$9,899,000
8291396	Scheduling optimization of aliased pointers for implementation on programmable chips	David James Lau, Jeffrey Orion Pritchard	2012-10-16	$9,103,000
8200472	Method and apparatus for providing protected intellectual property	Tony San	2012-06-12	$10,213,000
7991606	Embedded logic analyzer functionality for system level environments	Maria D'Souza	2011-08-02	$9,237,000
7882457	DSP design system level power estimation	Jordan Plofsky, Francois Pequillat	2011-02-01	$18,024,000
7873953	High-level language code sequence optimization for implementing programmable chip designs	Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, James Ball, Jesse Kempa	2011-01-18	$16,589,000
7865347	Finite impulse response (FIR) filter compiler for estimating cost of implementing a filter	Tony San	2011-01-04	$8,011,000
7676355	Method and apparatus for providing protected intellectual property	Tony San	2010-03-09	$4,521,000
7509246	System level simulation models for hardware modules	Tony San, Jeffrey R. Fox	2009-03-24	$7,911,000
7480603	Finite impulse response (FIR) filter compiler	Tony San	2009-01-20	$10,311,000
7360189	Method and apparatus for enabling waveform display in a system design model	—	2008-04-15	$4,201,000
7318014	Bit accurate hardware simulation in system level simulators	Tony San	2008-01-08	$4,040,000
7181384	Method and apparatus for simulating a hybrid system with registered and concurrent nodes	Adam Schott Riggs	2007-02-20	$5,107,000
7143368	DSP design system level power estimation	Jordan Plofsky, Francois Pequillat	2006-11-28	$6,167,000
7110927	Finite impulse response (FIR) filter compiler	Tony San	2006-09-19	$3,186,000
7089173	Hardware opencore evaluation	Tony San	2006-08-08	$6,040,000
6634009	Interleaver-deinterleaver megacore	Tony San	2003-10-14	$42,770,000

Philippe Molson — 25 Patents

Issued Patents All Time

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