Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › DSP design system level power estimation

DSP design system level power estimation

US Patent 7882457 · Granted Feb 1, 2011

Estimated economic value: $18,024,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Methods and apparatus for performing design for debug via protocol interface2020
Apparatus and methods for multiple-channel direct memory access2017
High-speed peripheral component interconnect (PCIe) input-output devices with re2017
Mask set for fabricating integrated circuits and method of fabricating integrate2016
High-level language code sequence optimization for implementing programmable chi2016
Partial reconfiguration using configuration transaction layer packets2016
Modular direct memory access system2015
Systems including an I/O stack and methods for fabricating such systems2014
Mask set for fabricating integrated circuits and method of fabricating integrate2014
DSP design system level power estimation2014
DSP design system level power estimation2014
DSP design system level power estimation2014