Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12426342 | Low germanium, high boron silicon rich capping layer for PMOS contact resistance thermal stability | Debaleena Nandi, Cory Bomberger, Gilbert Dewey, Anand S. Murthy, Mauro J. Kobrinsky +6 more | 2025-09-23 |
| 12414366 | Co-integration of high voltage (HV) and low voltage (LV) transistor structures, using channel height and spacing modulation | Prashant Majhi, Anand S. Murthy, Glenn A. Glass, Susmita Ghose | 2025-09-09 |
| 12166124 | Gate-all-around integrated circuit structures having germanium-doped nanoribbon channel structures | Ryan Murray Hickey, Glenn A. Glass, Anand S. Murthy, Ju H. Nam | 2024-12-10 |
| 10699866 | Modular fuse holder and arrangement and connection thereof | Patrick Thomas McKinney, Aswini N, Brandon William Fisher | 2020-06-30 |
| 10395878 | Modular fuse holder and arrangement and connection thereof | Patrick Thomas McKinney, Aswini N, Brandon William Fisher | 2019-08-27 |