RG

Robert A. Gasser

IN Intel: 5 patents #7,174 of 30,777Top 25%
Overall (All Time): #1,051,541 of 4,157,543Top 30%
5
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
5986315 Guard wall to reduce delamination effects within a semiconductor die Melton C. Bost, Shi-ning Yang, Timothy L. Deeter 1999-11-16
5844300 Single poly devices for monitoring the level and polarity of process induced charging in a MOS process Mohsen Alavi, Payman Aminzadeh, Sunit Tyagi, Gilroy Vandentop 1998-12-01
5270256 Method of forming a guard wall to reduce delamination effects Melton C. Bost, Shi-ning Yang, Timothy L. Deeter 1993-12-14
4620986 MOS rear end processing Leopoldo D. Yau, Kenneth R. Week, Jr., Jick Yu, David D. Chin 1986-11-04
4587138 MOS rear end processing Leopoldo D. Yau, Kenneth R. Week, Jr., Jick Yu, David D. Chin 1986-05-06