Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11223361 | Interface for parallel configuration of programmable devices | Kevin Clark, Scott J. Weber, James Ball, Simon Chong, Aravind Raghavendra Dasu +1 more | 2022-01-11 |
| 11190460 | System-in-package network processors | Kevin Clark, Scott J. Weber, Aravind Raghavendra Dasu | 2021-11-30 |
| 10964624 | Techniques for fluid cooling of integrated circuits in packages | Aravind Raghavendra Dasu | 2021-03-30 |
| 10833679 | Multi-purpose interface for configuration data and user fabric data | Kevin Clark, Scott J. Weber, James Ball, Aravind Raghavendra Dasu | 2020-11-10 |
| 10812085 | Power management for multi-dimensional programmable logic devices | Karthik Chandrasekar, Guang Chen, Wendemagegnehu Beyene | 2020-10-20 |
| 10770443 | Clock architecture in heterogeneous system-in-package | Karthik Chandrasekar, Shreepad Amar Panth | 2020-09-08 |
| 10770372 | Fluid routing devices and methods for cooling integrated circuit packages | Arif Rahman, Aravind Raghavendra Dasu, Thomas Sarvey, Devdatta P. Kulkarni | 2020-09-08 |
| 10666265 | Interface for parallel configuration of programmable devices | Kevin Clark, Scott J. Weber, James Ball, Simon Chong, Aravind Raghavendra Dasu +1 more | 2020-05-26 |
| 10504819 | Integrated circuit package with enhanced cooling structure | Arifur Rahman, Karthik Chandrasekar | 2019-12-10 |
| 8610281 | Double-sided semiconductor structure using through-silicon vias | Andy T. Nguyen, Kuldeep Amarnath | 2013-12-17 |
| 8301977 | Accelerating phase change memory writes | Meenatchi Jagasivmani, Anthony Suk Ko, Rich Fackenthal, Ferdinando Bedeschi, Enzo M. Donze | 2012-10-30 |
| 8027186 | Programming a phase change memory | Ferdinando Bedeschi, Johnny Javanifard | 2011-09-27 |
| 6459625 | Three metal process for optimizing layout density | Colin S. Bill, Jonathan Su | 2002-10-01 |
| 6430087 | Trimming method and system for wordline booster to minimize process variation of boosted wordline voltage | Colin S. Bill | 2002-08-06 |
| 6275415 | Multiple byte channel hot electron programming using ramped gate and source bias voltage | Sameer Haddad, Ravi Sunkavalli, Wing Leung, John Chen, Colin S. Bill +1 more | 2001-08-14 |
| 6205059 | Method for erasing flash electrically erasable programmable read-only memory (EEPROM) | Jonathan S. Su, Colin S. Bill | 2001-03-20 |
| 6157572 | Method for erasing flash electrically erasable programmable read-only memory (EEPROM) | Sameer Haddad, Wing Leung, John Chen, Ravi Sunkavalli, Jonathan S. Su +2 more | 2000-12-05 |
| 6134146 | Wordline driver for flash electrically erasable programmable read-only memory (EEPROM) | Colin S. Bill, Jonathan S. Su, Takao Akaogi | 2000-10-17 |
| 6122198 | Bit by bit APDE verify for flash memory applications | Sameer Haddad, Colin S. Bill | 2000-09-19 |
| 6088287 | Flash memory architecture employing three layer metal interconnect for word line decoding | Colin S. Bill, Jonathan Su | 2000-07-11 |
| 6009014 | Erase verify scheme for NAND flash | Shane Hollmer, Chung-You Hu, Binh Quang Le, Pau-Ling Chen, Jonathan S. Su +1 more | 1999-12-28 |
| 5901090 | Method for erasing flash electrically erasable programmable read-only memory (EEPROM) | Sameer Haddad, Wing Leung, John Chen, Ravi Sunkavalli, Jonathan S. Su +2 more | 1999-05-04 |
| 5875130 | Method for programming flash electrically erasable programmable read-only memory | Sameer Haddad, Wing Leung, John Chen, Ravi Sunkavalli, Jonathan S. Su +2 more | 1999-02-23 |
| 5754475 | Bit line discharge method for reading a multiple bits-per-cell flash EEPROM | Colin S. Bill, Qimeng Zhou, Jonathan S. Su | 1998-05-19 |
| 5724284 | Multiple bits-per-cell flash shift register page buffer | Colin S. Bill, Qimeng Derek Zhou, Jonathan S. Su | 1998-03-03 |