Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11004780 | Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macro | Kambiz Samadi, Yang Du, Robert P. Gilmore | 2021-05-11 |
| 10770443 | Clock architecture in heterogeneous system-in-package | Karthik Chandrasekar, Ravi Prakash Gutala | 2020-09-08 |
| 10510651 | Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macro | Kambiz Samadi, Yang Du, Robert P. Gilmore | 2019-12-17 |
| 10192813 | Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macro | Kambiz Samadi, Yang Du, Robert P. Gilmore | 2019-01-29 |
| 9123721 | Placement of monolithic inter-tier vias (MIVs) within monolithic three dimensional (3D) integrated circuits (ICs) (3DICs) using clustering to increase usable whitespace | Kambiz Samadi, Pratyush Kamal, Yang Du | 2015-09-01 |
| 9098666 | Clock distribution network for 3D integrated circuit | Kambiz Samadi, Jing Xie, Yang Du | 2015-08-04 |
| 9064077 | 3D floorplanning using 2D and 3D blocks | Kambiz Samadi, Yang Du | 2015-06-23 |