Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11128293 | Compensation for device property variation according to wafer location | Michael J. Krasowski, Norman F. Prokop, Philip G. Neudeck | 2021-09-21 |
| 11004802 | Reliability extreme temperature integrated circuits and method for producing the same | Philip G. Neudeck | 2021-05-11 |
| 10490550 | Larger-area integrated electrical metallization dielectric structures with stress-managed unit cells for more capable extreme environment semiconductor electronics | Philip G. Neudeck | 2019-11-26 |
| 10256202 | Durable bond pad structure for electrical connection to extreme environment microelectronic integrated circuits | Dorothy Lukco, Philip G. Neudeck, Carl Chang, Liangyu Chen, Roger D. Meredith +5 more | 2019-04-09 |
| 9978686 | Interconnection of semiconductor devices in extreme environment microelectronic integrated circuit chips | Philip G. Neudeck | 2018-05-22 |
| 9013002 | Iridium interfacial stack (IRIS) | — | 2015-04-21 |
| 7449065 | Method for the growth of large low-defect single crystals | J. Anthony Powell, Philip G. Neudeck, Andrew J. Trunek | 2008-11-11 |