MK

Muhammad M. Khellah

IN Intel: 130 patents #122 of 30,777Top 1%
📍 Tigard, OR: #2 of 696 inventorsTop 1%
🗺 Oregon: #124 of 28,073 inventorsTop 1%
Overall (All Time): #8,252 of 4,157,543Top 1%
131
Patents All Time

Issued Patents All Time

Showing 26–50 of 131 patents

Patent #TitleCo-InventorsDate
10511224 Bi-directional multi-mode charge pump Jaydeep P. Kulkarni, Yong Shim, Pascal A. Meinerzhagen 2019-12-17
10489702 Hybrid compression scheme for efficient storage of synaptic weights in hardware neuromorphic cores Somnath Paul, Charles Augustine 2019-11-26
10483961 Charge injector with integrated level shifter for localized mitigation of supply voltage droop Suyoung Bang, Minki Cho, Pascal A. Meinerzhagen 2019-11-19
10454476 Calibrated biasing of sleep transistor in integrated circuits Suyoung Bang, Charles Augustine, Pascal A. Meinerzhagen, Minki Cho 2019-10-22
10423203 Flip-flop circuit with low-leakage transistors Charles Augustine, Rafael Rios, Somnath Paul 2019-09-24
10418076 Apparatus for data retention and supply noise mitigation using clamps Pascal A. Meinerzhagen, Stephen Kim, Anupama A. Thaploo 2019-09-17
10410699 Multi-bit pulsed latch including serial scan chain Anupama A. Thaploo, Bhushan M. Borole, Pascal A. Meinerzhagen 2019-09-10
10403266 Detecting keywords in audio using a spiking neural network Oren Arad, Binuraj Ravindran, Somnath Paul, Charles Augustine, Bruno Umbria Pedroni 2019-09-03
10374584 Low power retention flip-flop with level-sensitive scan circuitry Charles Augustine, Arvind Raman, Feroze Merchant, Ashish V. Choubal 2019-08-06
10359834 Graphics processor sub-domain voltage regulation Subramaniam Maiyuran, James W. Tschanz 2019-07-23
10333379 Power switching circuitry including power-up control Suphachai Chai Sutanthavibul, Iqbal Rajwani, Anupama A. Thaploo, Surya Sasi Kiran Tallapragada, Daivik H Bhatt +3 more 2019-06-25
10269419 Aging aware dynamic keeper apparatus and associated method Jaydeep P. Kulkarni, Vivek K. De 2019-04-23
10243563 Voltage level shifter monitor with tunable voltage level shifter replica circuit Andrea Bonetti, Jaydeep P. Kulkarni, Carlos Tokunaga, Minki Cho, Pascal A. Meinerzhagen 2019-03-26
10217509 Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks Jaydeep P. Kulkarni, Bibiche M. Geuskens, James W. Tschanz, Vivek K. De 2019-02-26
10199091 Retention minimum voltage determination techniques Minki Cho, Jaydeep P. Kulkarni, Carlos Tokunaga, James W. Tschanz 2019-02-05
10199080 Low swing bitline for sensing arrays Jaydeep P. Kulkarni 2019-02-05
10122347 Adaptive voltage system for aging guard-band reduction Minki Cho, Jaydeep P. Kulkarni, Carlos Tokunaga, James W. Tschanz 2018-11-06
10014767 Bi-directional multi-mode charge pump Jaydeep P. Kulkarni, Yong Shim, Pascal A. Meinerzhagen 2018-07-03
9978447 Memory cell with improved write margin Yih Wang, Fatih Hamzaoglu 2018-05-22
9953690 Apparatuses, methods, and systems for stochastic memory circuits using magnetic tunnel junctions Charles Augustine, Somnath Paul, Sadique Ul Ameen Sheik 2018-04-24
9805790 Memory cell with retention using resistive memory Nathaniel J. August, Pulkit Jain, Stefan Rusu, Fatih Hamzaoglu, Rangharajan Venkatesan +4 more 2017-10-31
9766827 Apparatus for data retention and supply noise mitigation using clamps Pascal A. Meinerzhagen, Stephen Kim, Anupama A. Thaploo 2017-09-19
9755631 Apparatus and method for reducing di/dt during power wake-up Yong Shim, Jaydeep P. Kulkarni, Pascal A. Meinerzhagen 2017-09-05
9734880 Apparatuses, methods, and systems for stochastic memory circuits using magnetic tunnel junctions Charles Augustine, Somnath Paul, Sadique Ul Ameen Sheik 2017-08-15
9685208 Assist circuit for memory Jaydeep P. Kulkarni, Anupama A. Thaploo, Iqbal Rajwani, Kyung Hoae Koo, Eric A. Karl 2017-06-20