Issued Patents All Time
Showing 226–250 of 270 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6779084 | Enqueue operations for multi-buffer packets | Mark Rosenbluth, Debra Bernstein | 2004-08-17 |
| 6738831 | Command ordering | Mark Rosenbluth, Debra Bernstein, Richard Guerin | 2004-05-18 |
| 6728845 | SRAM controller for parallel processor architecture and method for controlling access to a RAM using read and read/write queues | Matthew J. Adiletta, William R. Wheeler, James Redfield, Daniel Cutter | 2004-04-27 |
| 6694380 | Mapping requests from a processing unit that uses memory-mapped input-output space | Debra Bernstein, Daniel Cutter, Christopher Dolan, Matthew J. Adiletta | 2004-02-17 |
| 6687246 | Scalable switching fabric | Matthew J. Adiletta, John Cyr | 2004-02-03 |
| 6681300 | Read lock miss control and queue management | Daniel Cutter, William R. Wheeler, Matthew J. Adiletta, Debra Bernstein | 2004-01-20 |
| 6668317 | Microengine for parallel processor architecture | Debra Bernstein, Donald F. Hooper, Matthew J. Adiletta, William R. Wheeler | 2003-12-23 |
| 6668311 | Method for memory allocation and management using push/pop apparatus | Donald F. Hooper, Matthew J. Adiletta, William R. Wheeler | 2003-12-23 |
| 6667920 | Scratchpad memory | Debra Bernstein, Matthew J. Adiletta | 2003-12-23 |
| 6661794 | Method and apparatus for gigabit packet assignment for multithreaded packet processing | Debra Bernstein, Matthew J. Adiletta, Donald F. Hooper | 2003-12-09 |
| 6631430 | Optimizations to receive packet status from fifo bus | Debra Bernstein, Matthew J. Adiletta | 2003-10-07 |
| 6631462 | Memory shared between processing threads | Matthew J. Adiletta, William R. Wheeler, Daniel Cutter, Debra Bernstein | 2003-10-07 |
| 6629237 | Solving parallel problems employing hardware multi-threading in a parallel processing environment | William R. Wheeler, Matthew J. Adiletta | 2003-09-30 |
| 6625654 | Thread signaling in multi-threaded network processor | Debra Bernstein, Donald F. Hooper, Matthew J. Adiletta, William R. Wheeler | 2003-09-23 |
| 6606704 | Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcode | Matthew J. Adiletta, William R. Wheeler | 2003-08-12 |
| 6587906 | Parallel multi-threaded processing | Debra Bernstein, Matthew J. Adiletta, William R. Wheeler | 2003-07-01 |
| 6584522 | Communication between processors | Debra Bernstein, Matthew J. Adiletta | 2003-06-24 |
| 6577542 | Scratchpad memory | Debra Bernstein, Matthew J. Adiletta | 2003-06-10 |
| 6560667 | Handling contiguous memory references in a multi-queue system | Debra Bernstein, Matthew J. Adiletta, William R. Wheeler | 2003-05-06 |
| 6532509 | Arbitrating command requests in a parallel multi-threaded processing system | Debra Bernstein, Matthew J. Adiletta, William R. Wheeler | 2003-03-11 |
| 6463072 | Method and apparatus for sharing access to a bus | Debra Bernstein, Matthew J. Adiletta | 2002-10-08 |
| 6427196 | SRAM controller for parallel processor architecture including address and command queue and arbiter | Matthew J. Adiletta, William R. Wheeler, James Redfield, Daniel Cutter | 2002-07-30 |
| 6324624 | Read lock miss control and queue management | Daniel Cutter, William R. Wheeler, Matthew J. Adiletta, Debra Bernstein | 2001-11-27 |
| 6307789 | Scratchpad memory | Debra Bernstein, Matthew J. Adiletta | 2001-10-23 |
| 6160809 | Distributed packet data with centralized snooping and header processing router | Matthew J. Adiletta, John Cyr | 2000-12-12 |