GP

Gerald George Pechanek

IN Intel: 65 patents #432 of 30,777Top 2%
IBM: 33 patents #2,996 of 70,183Top 5%
PT Pts: 23 patents #1 of 123Top 1%
BO Bops: 16 patents #1 of 12Top 9%
BS Billions Of Operations Per Second: 8 patents #1 of 11Top 10%
📍 Cary, NC: #13 of 3,681 inventorsTop 1%
🗺 North Carolina: #50 of 45,564 inventorsTop 1%
Overall (All Time): #5,345 of 4,157,543Top 1%
161
Patents All Time

Issued Patents All Time

Showing 101–125 of 161 patents

Patent #TitleCo-InventorsDate
6748517 Constructing database representing manifold array architecture instruction set for use in support tool code creation David Strube, Edwin Frank Barry, Charles W. Kurak, Jr., Carl Donald Busboom, Dale Edward Schneider +6 more 2004-06-08
6735690 Specifying different type generalized event and action pair in a processor Edwin Franklin Barry, Patrick R. Marchand, Charles W. Kurak, Jr. 2004-05-11
6704857 Methods and apparatus for loading a very long instruction word memory Edwin Frank Barry 2004-03-09
6622234 Methods and apparatus for initiating and resynchronizing multi-cycle SIMD instructions David Strube, Edward A. Wolff, Edwin Frank Barry, Grayson Morris, Carl Donald Busboom +1 more 2003-09-16
6606699 Merged control/process element processor for executing VLIW simplex instructions with SISD control/SIMD process mode bit Juan Guillermo Revilla 2003-08-12
6581152 Methods and apparatus for instruction addressing in indirect VLIW processors Edwin Frank Barry 2003-06-17
6557094 Methods and apparatus for scalable instruction set architecture with dynamic compact instructions Edwin Franklin Barry, Juan Guillermo Revilla, Larry D. Larsen 2003-04-29
6470441 Methods and apparatus for manifold array processing Nikos P. Pitsianis, Edwin Frank Barry, Thomas L. Drabenstott 2002-10-22
6467036 Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor Juan Guillermo Revilla, Edwin Frank Barry 2002-10-15
6446191 Methods and apparatus for efficient synchronous MIMD operations with iVLIW PE-to-PE communication Thomas L. Drabenstott, Juan Guillermo Revilla, David Strube, Grayson Morris 2002-09-03
6446190 Register file indexing methods and apparatus for providing indirect control of register addressing in a VLIW processor Edwin Franklin Barry, Patrick R. Marchand 2002-09-03
6430677 Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision Edwin Frank Barry 2002-08-06
6408382 Methods and apparatus for abbreviated instruction sets adaptable to configurable processor architecture Charles W. Kurak, Jr., Larry D. Larsen 2002-06-18
6405185 Massively parallel array processor Stamatis Vassiliadis, Jose G. Delgado-Frias 2002-06-11
6397324 Accessing tables in memory banks using load and store address generators sharing store read port of compute register file separated from address register file Edwin Frank Barry, Charles W. Kurak, Jr., Larry D. Larsen 2002-05-28
6366999 Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution Thomas L. Drabenstott, Edwin Frank Barry, Charles W. Kurak, Jr. 2002-04-02
6366997 Methods and apparatus for manarray PE-PE switch control Edwin Frank Barry, Thomas L. Drabenstott, Edward A. Wolff, Nikos P. Pitsianis, Grayson Morris 2002-04-02
6356994 Methods and apparatus for instruction addressing in indirect VLIW processors Edwin Franklin Barry 2002-03-12
6343356 Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precision Edwin Frank Barry 2002-01-29
6338129 Manifold array processor Charles W. Kurak, Jr. 2002-01-08
6321322 Methods and apparatus for scalable instruction set architecture with dynamic compact instructions Edwin Frank Barry, Juan Guillermo Revilla, Larry D. Larsen 2001-11-20
6219776 Merged array controller and processing element Juan Guillermo Revilla 2001-04-17
6216223 Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor Juan Guillermo Revilla, Edwin Frank Barry, Patrick R. Marchand 2001-04-10
6173389 Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor Juan Guillermo Revilla, Edwin Frank Barry 2001-01-09
6167501 Methods and apparatus for manarray PE-PE switch control Edwin Frank Barry, Thomas L. Drabenstott, Edward A. Wolff, Nikos P. Pitsianis, Grayson Morris 2000-12-26