DR

Dion Rodgers

IN Intel: 48 patents #671 of 30,777Top 3%
📍 Hillsboro, OR: #62 of 2,365 inventorsTop 3%
🗺 Oregon: #665 of 28,073 inventorsTop 3%
Overall (All Time): #52,639 of 4,157,543Top 2%
51
Patents All Time

Issued Patents All Time

Showing 26–50 of 51 patents

Patent #TitleCo-InventorsDate
8171270 Asynchronous control transfer Chris J. Newburn, Robert Knight, Ittai Anati, Aaron N. Levinson, Gautham Chinya 2012-05-01
8171268 Technique for context state management to reduce save and restore operations between a memory and a processor using in-use vectors Chris J. Newburn, Bryant Bigbee, Shivnandan Kaushik, Gautham Chinya, Xiang Zou +1 more 2012-05-01
8151264 Injecting virtualization events in a layered virtualization architecture Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Barry E. Huntley, Lawrence O. Smith 2012-04-03
8099581 Synchronizing a translation lookaside buffer with an extended paging table Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Rajesh Madukkaraumukumana +2 more 2012-01-17
7975267 Virtual interrupt processing in a layered virtualization architecture Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Lawrence O. Smith +1 more 2011-07-05
7900204 Interrupt processing in a layered virtualization architecture Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Lawrence O. Smith +1 more 2011-03-01
7886126 Extended paging tables to map guest physical memory addresses from virtual memory page tables to host physical memory addresses in a virtual machine system Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Rajesh Madukkarumukumana, Richard Uhlig +1 more 2011-02-08
7840962 System and method for controlling switching between VMM and VM using enabling value of VMM timer indicator and VMM timer value having a specified time Gilbert Neiger, Steven M. Bennett, Erik Cota-Robles, Sebastian Schoenberg, Clifford D. Hall +5 more 2010-11-23
7779239 User opt-in processor feature control capability Stephen A. Fischer, James A. Sutton 2010-08-17
7581219 Transitioning between virtual machine monitor domains in a virtual machine environment Gilbert Neiger, Steven M. Bennett, Richard Uhlig, Lawrence O. Smith 2009-08-25
7555628 Synchronizing a translation lookaside buffer to an extended paging table Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Rajesh M. Sankaran +2 more 2009-06-30
7451296 Method and apparatus for pausing execution in a processor or the like Deborah T. Marr 2008-11-11
7370160 Virtualizing memory type Gilbert Neiger, Steven M. Bennett, Andrew V. Anderson, David A. Koufaty, Richard Uhlig +3 more 2008-05-06
7366879 Alteration of functional unit partitioning scheme in multithreaded processor based upon thread statuses Darrell D. Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu 2008-04-29
7363474 Method and apparatus for suspending execution of a thread until a specified memory access occurs Deborah T. Marr, David L. Hill, Shiv Kaushik, James B. Crossland, David A. Koufaty 2008-04-22
7353370 Method and apparatus for processing an event occurrence within a multithreaded processor Darrell D. Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur 2008-04-01
7318141 Methods and systems to control virtual machines Steve Bennett, Gilbert Neiger, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi +5 more 2008-01-08
7305592 Support for nested fault in a virtual machine environment Gilbert Neiger, Andrew V. Anderson, Steven M. Bennett, Jason W. Brandt, Erik Cota-Robles +6 more 2007-12-04
7127561 Coherency techniques for suspending execution of a thread until a specified memory access occurs David L. Hill, Deborah T. Marr, Shiv Kaushik, James B. Crossland, David A. Koufaty 2006-10-24
7100029 Performing repeat string operations Xiang Zou, Rajesh S. Parthasarathy, Madhavan Parthasarathy 2006-08-29
7039794 Method and apparatus for processing an event occurrence for a least one thread within a multithreaded processor Darrell D. Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur 2006-05-02
6889319 Method and apparatus for entering and exiting multiple threads within a multithreaded processor Darrell D. Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu 2005-05-03
6883107 Method and apparatus for disabling a clock signal within a multithreaded processor Bret L. Toll, Aimee D. Wood 2005-04-19
6671795 Method and apparatus for pausing execution in a processor or the like Deborah T. Marr 2003-12-30
6496925 Method and apparatus for processing an event occurrence within a multithreaded processor Darrell D. Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur 2002-12-17