Issued Patents All Time
Showing 176–199 of 199 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9164762 | Rotate instructions that complete execution without reading carry flag | Vinodh Gopal, James D. Gulilford, Gilbert M. Wolrich, Waidi K. Feghali, Erdinc Ozturk +5 more | 2015-10-20 |
| 9003170 | Bit range isolation instructions, methods, and apparatus | Maxim Loktyukhin, Eric W. Mahurin, Martin G. Dixon, Sean P. Mirkes, David L. Kreitzer +2 more | 2015-04-07 |
| 8793470 | Length determination of instruction code with address form field and escape opcode value by evaluating portions other than instruction specific opcode | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2014-07-29 |
| 8738893 | Add instructions to add three source operands | Vindoh Gopal, James D. Guilford, Gilbert M. Wolrich, Wajdi K. Feghali, Erdinc Ozturk +5 more | 2014-05-27 |
| 8549264 | Add instructions to add three source operands | Vinodh Gopal, James D. Guilford, Gilbert M. Wolrich, Wajdi K. Feghali, Erdinc Ozturk +5 more | 2013-10-01 |
| 8504802 | Compressed instruction format | Robert Valentine, Doron Orenstien | 2013-08-06 |
| 8504807 | Rotate instructions that complete execution without reading carry flag | Vinodh Gopal, James D. Guilford, Gilbert M. Wolrich, Wajdi K. Feghali, Erdinc Ozturk +5 more | 2013-08-06 |
| 8447962 | Gathering and scattering multiple data elements | Christopher J. Hughes, Yen-Kuang Chen, Mayank Bomb, Jason W. Brandt, Mark Buxton +13 more | 2013-05-21 |
| 8402252 | Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcode | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2013-03-19 |
| 8281109 | Compressed instruction format | Robert Valentine, Doron Orenstein | 2012-10-02 |
| 8161269 | Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcode | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2012-04-17 |
| 7966476 | Determining length of instruction with escape and addressing form bytes without evaluating opcode | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2011-06-21 |
| 7941651 | Method and apparatus for combining micro-operations to process immediate data | John A. Miller, Michael A. Fetterman | 2011-05-10 |
| 7917734 | Determining length of instruction with multiple byte escape code based on information from other than opcode byte | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2011-03-29 |
| 7617382 | Method and apparatus for decompressing relative addresses | Michael J. St. Clair, John A. Miller, Hitesh Ahuja | 2009-11-10 |
| 7430578 | Method and apparatus for performing multiply-add operations on packed byte data | Eric L. Debes, William W. Macy, Jonathan J. Tyler, James S. Coke, Frank Binns +5 more | 2008-09-30 |
| 7111148 | Method and apparatus for compressing relative addresses | Michael J. St. Clair, John A. Miller, Hitesh Ahuja | 2006-09-19 |
| 7103751 | Method and apparatus for representation of an address in canonical form | John A. Miller, Michael A. Fetterman | 2006-09-05 |
| 7010665 | Method and apparatus for decompressing relative addresses | Michael J. St. Clair, John A. Miller, Hitesh Ahuja | 2006-03-07 |
| 6981163 | Method and apparatus for power mode transition in a multi-thread processor | Alan B. Kyker, Stephen H. Gunther | 2005-12-27 |
| 6883107 | Method and apparatus for disabling a clock signal within a multithreaded processor | Dion Rodgers, Aimee D. Wood | 2005-04-19 |
| 6775786 | Method and apparatus for power mode transition in a multi-thread processor | Alan B. Kyker, Stephen H. Gunther | 2004-08-10 |
| 6357016 | Method and apparatus for disabling a clock signal within a multithreaded processor | Dion Rodgers, Aimee D. Wood | 2002-03-12 |
| 6308279 | Method and apparatus for power mode transition in a multi-thread processor | Alan B. Kyker, Stephen H. Gunther | 2001-10-23 |