Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12373208 | Processor instruction for dynamic floating point exponent extraction | Diego Andres Guerra, Butchi Venkata Chaitanya Akondi, Albert Danysh | 2025-07-29 |
| 12093800 | Hybrid convolution operation | — | 2024-09-17 |
| 11669747 | Constraining function approximation hardware integrated with fixed-point to floating-point conversion | Rexford Hill, Aaron Douglass LAMB, Albert Danysh, Erich James Plondke, David Hoyle | 2023-06-06 |
| 11669273 | Memory access management | Hitesh Gupta, Ahmad Mahmoud Radaideh | 2023-06-06 |
| 11609764 | Inserting a proxy read instruction in an instruction pipeline in a processor | Ahmad Mahmoud Radaideh | 2023-03-21 |
| 11586272 | Power control based on performance modification through pulse modulation | Vijay Kiran Kalyanam | 2023-02-21 |
| 11561792 | System, apparatus, and method for a transient load instruction within a VLIW operation | Jakub Pawel Golab | 2023-01-24 |
| 11372804 | System and method of loading and replication of sub-vector values | Erich James Plondke, David Hoyle | 2022-06-28 |
| 11287872 | Multi-thread power limiting via shared limit | Vijay Kiran Kalyanam | 2022-03-29 |
| 10860051 | Proactive clock gating system to mitigate supply voltage droops | Vijay Kiran Kalyanam | 2020-12-08 |
| 10656947 | Processor to perform a bit range isolation instruction | Maxim Loktyukhin, Bret L. Toll, Martin G. Dixon, Sean P. Mirkes, David L. Kreitzer +2 more | 2020-05-19 |
| 10625752 | System and method for online functional testing for error-correcting code function | Mohammad Reza Kakoee, Rahul Gulati, Suresh K. Venkumahanti, Dexter Tamio Chun | 2020-04-21 |
| 10579379 | Processor to perform a bit range isolation instruction | Maxim Loktyukhin, Bret L. Toll, Martin G. Dixon, Sean P. Mirkes, David L. Kreitzer +2 more | 2020-03-03 |
| 10579380 | System-on-chip (SoC) to perform a bit range isolation instruction | Maxim Loktyukhin, Bret L. Toll, Martin G. Dixon, Sean P. Mirkes, David L. Kreitzer +2 more | 2020-03-03 |
| 10489155 | Mixed-width SIMD operations using even/odd register pairs for wide data elements | Ajay Anant Ingle | 2019-11-26 |
| 10474461 | Instruction-based synchronization of operations including at least one SIMD scatter operation | Lucian Codrescu | 2019-11-12 |
| 10459723 | SIMD instructions for multi-stage cube networks | — | 2019-10-29 |
| 10459731 | Sliding window operation | Jakub Pawel Golab | 2019-10-29 |
| 10372455 | Hand held device to perform a bit range isolation instruction | Maxim Loktyukhin, Bret L. Toll, Martin G. Dixon, Sean P. Mirkes, David L. Kreitzer +2 more | 2019-08-06 |
| 10346133 | System and method of floating point multiply operation processing | Albert Danysh, Erich James Plondke | 2019-07-09 |
| 10162752 | Data storage at contiguous memory addresses | David Hoyle | 2018-12-25 |
| 10152101 | Controlling voltage deviations in processing systems | Sanjay Bhagawan Patil, Martin Saint-Laurent | 2018-12-11 |
| 9678758 | Coprocessor for out-of-order loads | Lucian Codrescu, Christopher Edward Koob, Suresh K. Venkumahanti | 2017-06-13 |
| 9092213 | Functional unit for vector leading zeroes, vector trailing zeroes, vector operand 1s count and vector parity calculation | Jeff Wiedemeier, Sridhar Samudrala, Roger Golliver | 2015-07-28 |
| 9009449 | Reducing power consumption and resource utilization during miss lookahead | Yuan C. Chou | 2015-04-14 |