Issued Patents All Time
Showing 25 most recent of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12400103 | Variable quantization for neural networks | Chirag Sureshbhai Patel, Tijmen Pieter Frederik BLANKEVOORT, Jonathan Dewitt Wolfe | 2025-08-26 |
| 12086636 | Memory-bound scheduling | Jonathan Dewitt Wolfe | 2024-09-10 |
| 11823043 | Machine learning with input data domain transformation | Jonathan Dewitt Wolfe | 2023-11-21 |
| 11669747 | Constraining function approximation hardware integrated with fixed-point to floating-point conversion | Rexford Hill, Eric W. Mahurin, Aaron Douglass LAMB, Albert Danysh, David Hoyle | 2023-06-06 |
| 11372804 | System and method of loading and replication of sub-vector values | Eric W. Mahurin, David Hoyle | 2022-06-28 |
| 10706316 | System and method of feature descriptor processing | Kim-Chyan Gan, Mao Zeng | 2020-07-07 |
| 10437591 | Executing an operating system on processors having different instruction set architectures | Michael McDonald, Pavel Potoplyak, Lucian Codrescu, Richard Lee-Chee Kuo, Bryan C. Bayerdorffer | 2019-10-08 |
| 10346133 | System and method of floating point multiply operation processing | Albert Danysh, Eric W. Mahurin | 2019-07-09 |
| 10289412 | Floating point constant generation instruction | Lucian Codrescu, Charles Joseph Tabony, Swaminathan Balasubramanian | 2019-05-14 |
| 10133598 | Systems and methods of using a hypervisor to assign virtual processor priority based on task priority and to schedule virtual processors for guest operating systems | Lucian Codrescu | 2018-11-20 |
| 10114756 | Externally programmable memory management unit | Christopher Edward Koob, Piyush Patel, Thomas Andrew Sartorius, Lucian Codrescu | 2018-10-30 |
| 10108487 | Parity for instruction packets | — | 2018-10-23 |
| 10055227 | Using the least significant bits of a called function's address to switch processor modes | Charles Joseph Tabony, Lucian Codrescu, Suresh K. Venkumahanti, Evandro Menezes | 2018-08-21 |
| 9858201 | Selective translation lookaside buffer search and page fault | Christopher Edward Koob, Jiajin Tu | 2018-01-02 |
| 9823928 | FIFO load instruction | Mao Zeng, Lucian Codrescu, Ajay Anant Ingle | 2017-11-21 |
| 9785434 | Fast minimum and maximum searching instruction | Lucian Codrescu, Mao Zeng, Swaminathan Balasubramanian, David Hoyle | 2017-10-10 |
| 9678754 | System and method of processing hierarchical very long instruction packets | Lucian Codrescu, Ajay Anant Ingle, Suresh K. Venkumahanti, Charles Joseph Tabony | 2017-06-13 |
| 9658793 | Adaptive mode translation lookaside buffer search and access fault | Christopher Edward Koob, Jiajin Tu | 2017-05-23 |
| 9606818 | Systems and methods of executing multiple hypervisors using multiple sets of processors | Lucian Codrescu, Christopher Edward Koob, Piyush Patel, Thomas Andrew Sartorius | 2017-03-28 |
| 9501332 | System and method to reset a lock indication | Dana Michelle Vantrease, Christopher Edward Koob | 2016-11-22 |
| 9455743 | Dedicated arithmetic encoding instruction | Bo Zhou, Mao Zeng, Lucian Codrescu, Shu Xiao, Junchen Du +1 more | 2016-09-27 |
| 9396012 | Systems and methods of using a hypervisor with guest operating systems and virtual processors | Lucian Codrescu | 2016-07-19 |
| 9390264 | Hardware-based stack control information protection | Can Acar, Robert John Turner, Billy B. Brumley | 2016-07-12 |
| 9361109 | System and method to evaluate a data value as an instruction | Lucian Codrescu, Suresh K. Venkumahanti | 2016-06-07 |
| 9235418 | Register files for a digital signal processor operating in an interleaved multi-threaded environment | Muhammad Ahmed, Lucian Codrescu, William C. Anderson | 2016-01-12 |