CH

Cheng-Chen Calvin Hsueh

IT Integrated Device Technology: 6 patents #105 of 758Top 15%
MC Macronix International Co.: 6 patents #272 of 1,241Top 25%
TSMC: 6 patents #3,824 of 12,232Top 35%
NS National Semiconductor: 1 patents #1,247 of 2,238Top 60%
📍 Sunnyvale, CA: #1,340 of 14,302 inventorsTop 10%
🗺 California: #30,698 of 386,348 inventorsTop 8%
Overall (All Time): #240,339 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDate
8834671 Apparatus and method for controlling silicon nitride etching tank Zin-Chang Wei, Tsung-Min Huang, Ming-Tsao Chiang 2014-09-16
8409997 Apparatus and method for controlling silicon nitride etching tank Zin-Chang Wei, Tsung-Min Huang, Ming-Tsao Chiang 2013-04-02
8012846 Isolation structures and methods of fabricating isolation structures Cheng-Yuan Tsai, Chih-Lung Lin 2011-09-06
8012922 Wet cleaning solution Cheng-Yuan Tsai, Chih-Lung Lin 2011-09-06
7795644 Integrated circuits with stress memory effect and fabrication methods thereof Mei-Yun Wang, Wu-An Weng 2010-09-14
7678694 Method for fabricating semiconductor device with silicided gate Mei-Yun Wang 2010-03-16
6998316 Method for fabricating read only memory including a first and second exposures to a photoresist layer Tahorng Yang, Henry Chung, Ching-Yu Chang 2006-02-14
6734064 Method for fabricating read only memory including forming masking layers with openings and pre-coding the cell and peripheral regions Tahorng Yang, Henry Chung, Ching-Yu Chang 2004-05-11
6670247 Method of fabricating mask read only memory 2003-12-30
6489213 Method for manufacturing semiconductor device containing a silicon-rich layer Shih-Ked Lee 2002-12-03
6468897 Method of forming damascene structure Chi-Feng Cheng 2002-10-22
6448136 Method of manufacturing flash memory Kent Kuohua Chang 2002-09-10
6444521 Method to improve nitride floating gate charge trapping for NROM flash memory device Kent Chang 2002-09-03
6136687 Method of forming air gaps for reducing interconnect capacitance Shih-Ked Lee, Chu-Tsao Yen, James R. Shih, Chuen-Der Lien 2000-10-24
5990009 Maximization of low dielectric constant material between interconnect traces of a semiconductor circuit Shih-Ked Lee, Chuen-Der Lien 1999-11-23
5981356 Isolation trenches with protected corners Chu-Tsao Yen 1999-11-09
5859458 Semiconductor device containing a silicon-rich layer Shih-Ked Lee 1999-01-12
5854503 Maximization of low dielectric constant material between interconnect traces of a semiconductor circuit Shih-Ked Lee, Chuen-Der Lien 1998-12-29
5573973 Integrated circuit having a diamond thin film trench arrangement as a component thereof and method Rakesh Sethi 1996-11-12