Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6818503 | Method for fabricating a semiconductor memory device | Rainer Bruchhaus, Gerhard Enders, Walter Hartner, Igor Kasko, Matthias Kronke +3 more | 2004-11-16 |
| 6815234 | Reducing stress in integrated circuits | Uwe Wellhausen, Stefan Gernhardt, Rainer Bruchhaus, Andreas Hilliger, Jing Yu Lian | 2004-11-09 |
| 6794705 | Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials | Jingyu Lian, Chenting Lin, Michael Wise | 2004-09-21 |
| 6787831 | Barrier stack with improved barrier properties | Bum Ki Moon, Gerhard Beitel, Andreas Hilliger, Koji Yamakawa, Keitaro Imai | 2004-09-07 |
| 6773986 | Method for fabricating a semiconductor memory device | Rainer Bruchhaus, Gerhard Enders, Walter Hartner, Matthias Kronke, Thomas Mikolajick +1 more | 2004-08-10 |
| 6704219 | FeRAM memory and method for manufacturing it | Rainer Bruchhaus, Gerhard Enders, Walter Hartner, Matthias Kronke, Thomas Mikolajick +1 more | 2004-03-09 |
| 6621683 | Memory cells with improved reliability | Bum Ki Moon, Andreas Hilliger, Gerhard Beitel | 2003-09-16 |
| 6614642 | Capacitor over plug structure | Bum Ki Moon, Moto Yabuki, Gerhard Beitel, Andreas Hilliger, Takamichi Tsuchiya | 2003-09-02 |
| 6583507 | Barrier for capacitor over plug structures | Bum Ki Moon, Gerhard Beitel | 2003-06-24 |
| 6573542 | Capacitor electrodes arrangement with oxygen iridium between silicon and oxygen barrier layer | Rainer Bruchhaus, Hermann Wendt, Igor Kasko, Robert Primig | 2003-06-03 |
| 6358855 | Clean method for recessed conductive barriers | Ravikumar Ramachandran, Christopher C. Parks | 2002-03-19 |
| 6011284 | Electronic material, its manufacturing method, dielectric capacitor, nonvolatile memory and semiconductor device | Kenji Katori, Koji Watanabe, Masahiro Tanaka | 2000-01-04 |
| 5994153 | Fabrication process of a capacitor structure of semiconductor memory cell | Kenji Katori | 1999-11-30 |
| 5864153 | Capacitor structure of semiconductor memory cell and fabrication process thereof | Kenji Katori | 1999-01-26 |