Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9472469 | Back gate in select transistor for eDRAM | Franz Hofmann | 2016-10-18 |
| 9251871 | Sense amplifier with dual gate precharge and decode transistors | Richard Ferrant, Joerg Vollrath, Roland Thewes, Wolfgang Hoenlein, Hofmann Franz | 2016-02-02 |
| 9159400 | Semiconductor memory having staggered sense amplifiers associated with a local column decoder | Richard Ferrant, Carlos Mazure | 2015-10-13 |
| 8492844 | Fully depleted SOI device with buried doped layer | Wolfgang Hoenlein, Franz Hofmann, Carlos Mazure | 2013-07-23 |
| 8138538 | Interconnect structure for semiconductor devices | Hans-Peter Moll, Gouri Sankar Kar, Martin Popp, Lars Heineck, Peter Lahnor +8 more | 2012-03-20 |
| 7372093 | DRAM memory with vertically arranged selection transistors | Michael Sommer | 2008-05-13 |
| 7335936 | DRAM memory having vertically arranged selection transistors | Michael Sommer | 2008-02-26 |
| 7163857 | Buried strap contact for a storage capacitor and method for fabricating it | Peter Voigt | 2007-01-16 |
| 7109091 | Method for processing a substrate to form a structure | — | 2006-09-19 |
| 7081392 | Method for fabricating a gate structure of a FET and gate structure of a FET | Peter Voigt | 2006-07-25 |
| 7045422 | Semiconductor gate structure and method for fabricating a semiconductor gate structure | Helmut Schneider, Peter Voigt | 2006-05-16 |
| 7034358 | Vertical transistor, and a method for producing a vertical transistor | Dietrich Bonart, Peter Voigt | 2006-04-25 |
| 7009263 | Field-effect transistor | Bjoern Fischer, Helmut Schneider, Peter Voigt | 2006-03-07 |
| 6992345 | Integrated semiconductor memory with a selection transistor formed at a ridge | Andreas Spitzer | 2006-01-31 |
| 6979853 | DRAM memory cell and memory cell array with fast read/write access | Michael Sommer | 2005-12-27 |
| 6876025 | Dram cell and space-optimized memory array | Michael Sommer | 2005-04-05 |
| 6858492 | Method for fabricating a semiconductor memory device | Rainer Bruchhaus, Walter Hartner, Matthias Kronke, Thomas Mikolajick, Nicolas Nagel +1 more | 2005-02-22 |
| 6838335 | Method for fabricating a vertical transistor, and semiconductor memory cell having a trench capacitor and an associated vertical selection transistor | Dietrich Bonart, Peter Voigt | 2005-01-04 |
| 6822281 | Trench cell for a DRAM cell array | Peter Voigt | 2004-11-23 |
| 6818503 | Method for fabricating a semiconductor memory device | Rainer Bruchhaus, Walter Hartner, Igor Kasko, Matthias Kronke, Thomas Mikolajick +3 more | 2004-11-16 |
| 6797562 | Method for manufacturing a buried strap contact in a memory cell | Dietrich Bonart, Bjoern Fischer, Peter Voigt | 2004-09-28 |
| 6773986 | Method for fabricating a semiconductor memory device | Rainer Bruchhaus, Walter Hartner, Matthias Kronke, Thomas Mikolajick, Nicolas Nagel +1 more | 2004-08-10 |
| 6770928 | Semiconductor memory with vertical selection transistor | Michael Sommer | 2004-08-03 |
| 6704219 | FeRAM memory and method for manufacturing it | Rainer Bruchhaus, Walter Hartner, Matthias Kronke, Thomas Mikolajick, Nicolas Nagel +1 more | 2004-03-09 |
| 6503784 | Double gated transistor | Thomas Schulz, Dietrich Widmann, Lothar Risch | 2003-01-07 |