Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6624461 | Memory device | Georg Braun | 2003-09-23 |
| 6567300 | Narrow contact design for magnetic random access memory (MRAM) arrays | Wolfgang Raberg | 2003-05-20 |
| 6552378 | Ultra compact DRAM cell and method of making | Louis L. Hsu, Jack A. Mandelman | 2003-04-22 |
| 6522579 | Non-orthogonal MRAM device | — | 2003-02-18 |
| 6500677 | Method for fabricating a ferroelectric memory configuration | Renate Bergmann, Christine Dehm, Thomas Roehr, Georg Braun, Gunther Schindler | 2002-12-31 |
| 6490194 | Serial MRAM device | — | 2002-12-03 |
| 6426269 | Dummy feature reduction using optical proximity effect correction | Henning Haffner, Donald J. Samuels | 2002-07-30 |
| 6426907 | Reference for MRAM cell | — | 2002-07-30 |
| 6420908 | Sense amplifier | Gerhard Mueller | 2002-07-16 |
| 6236258 | Wordline driver circuit using ring-shaped devices | Dmitry Netis | 2001-05-22 |
| 6157561 | Integrated circuit memory with low resistance, segmented power supply lines | Tobias Schlager, Georg Braun, Thomas Boehm | 2000-12-05 |
| 6037620 | DRAM cell with transfer device extending along perimeter of trench storage capacitor | Louis L. Hsu, Jack A. Mandelman | 2000-03-14 |
| 5970009 | Reduced stand by power consumption in a DRAM | Richard L. Kleinhenz, Jack A. Mandelman | 1999-10-19 |
| 5966315 | Semiconductor memory having hierarchical bit line architecture with non-uniform local bit lines | Gerhard Muller | 1999-10-12 |
| 5923605 | Space-efficient semiconductor memory having hierarchical column select line architecture | Gerhard Mueller | 1999-07-13 |
| 5875138 | Dynamic access memory equalizer circuits and methods therefor | — | 1999-02-23 |
| 5864496 | High density semiconductor memory having diagonal bit lines and dual word lines | Gerhard Mueller, Toshiaki Kirihata | 1999-01-26 |
| 5821592 | Dynamic random access memory arrays and methods therefor | John K. DeBrosse | 1998-10-13 |