Issued Patents All Time
Showing 276–300 of 311 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6651162 | Recursively accessing a branch target address cache using a target address previously accessed from the branch target address cache | David S. Levitan, Shashank Nemawarkar, Balaram Sinharoy | 2003-11-18 |
| 6643763 | Register pipe for multi-processing engine environment | Joseph L. Temple, III | 2003-11-04 |
| 6629209 | Cache coherency protocol permitting sharing of a locked data granule | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-30 |
| 6629212 | High speed lock acquisition mechanism with time parameterized cache coherency states | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-30 |
| 6629214 | Extended cache coherency protocol with a persistent “lock acquired” state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-30 |
| 6625701 | Extended cache coherency protocol with a modified store instruction lock release indicator | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-23 |
| 6606666 | Method and system for controlling information flow between a producer and a buffer in a high frequency digital system | Robert H. Bell, Jr., Robert Alan Cargnoni, Leo James Clark | 2003-08-12 |
| 6606680 | Method and apparatus for accessing banked embedded dynamic random access memory devices | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Praveen S. Reddy | 2003-08-12 |
| 6604145 | Method and system for controlling information flow in a high frequency digital system from a producer to a buffering consumer via an intermediate buffer and a shared data path | Robert H. Bell, Jr., Robert Alan Cargnoni, Leo James Clark | 2003-08-05 |
| 6601105 | Method and system for controlling information flow between a producer and multiple buffers in a high frequency digital system | Robert H. Bell, Jr., Robert Alan Cargnoni, Leo James Clark | 2003-07-29 |
| 6598086 | Method and system for controlling information flow in a high frequency digital system from a producer to a buffering consumer via an intermediate buffer | Robert H. Bell, Jr., Robert Alan Cargnoni, Leo James Clark | 2003-07-22 |
| 6574719 | Method and apparatus for concurrently communicating with multiple embedded dynamic random access memory devices | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Praveen S. Reddy | 2003-06-03 |
| 6549989 | Extended cache coherency protocol with a “lock released” state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-04-15 |
| 6493814 | Reducing resource collisions associated with memory units in a multi-level hierarchy memory system | James Stephen Fields, Jr., Jody B. Joyner, Jeffrey A. Stuecheli | 2002-12-10 |
| 6487637 | Method and system for clearing dependent speculations from a request queue | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie | 2002-11-26 |
| 6438656 | Method and system for cancelling speculative cache prefetch requests | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie | 2002-08-20 |
| 6430656 | Cache and management method using combined software and hardware congruence class selectors | Ravi Kumar Arimilli, Bryan Hunt | 2002-08-06 |
| 6421761 | Partitioned cache and management method for selectively caching data by type | Ravi Kumar Arimilli, Bryan Hunt | 2002-07-16 |
| 6418516 | Method and system for managing speculative requests in a multi-level memory hierarchy | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie | 2002-07-09 |
| 6385702 | High performance multiprocessor system with exclusive-deallocate cache state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-05-07 |
| 6374333 | Cache coherency protocol in which a load instruction hint bit is employed to indicate deallocation of a modified cache line supplied by intervention | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-04-16 |
| 6349369 | Protocol for transferring modified-unsolicited state during data intervention | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-02-19 |
| 6345342 | Cache coherency protocol employing a read operation including a programmable flag to indicate deallocation of an intervened cache line | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-02-05 |
| 6345343 | Multiprocessor system bus protocol with command and snoop responses for modified-unsolicited cache state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-02-05 |
| 6345344 | Cache allocation mechanism for modified-unsolicited cache state that modifies victimization priority bits | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-02-05 |