VS

Valentina Salapura

IBM: 522 patents #16 of 70,183Top 1%
Globalfoundries: 8 patents #444 of 4,424Top 15%
AM AMD: 2 patents #3,994 of 9,279Top 45%
IS International Business Systems: 1 patents #1 of 22Top 5%
IN Intel: 1 patents #18,218 of 30,777Top 60%
Microsoft: 1 patents #24,826 of 40,388Top 65%
🗺 California: #91 of 386,348 inventorsTop 1%
Overall (All Time): #332 of 4,157,543Top 1%
535
Patents All Time

Issued Patents All Time

Showing 376–400 of 535 patents

Patent #TitleCo-InventorsDate
9495202 Transaction digest generation during nested transactional execution Michael K. Gschwind 2016-11-15
9483582 Identification and verification of factual assertions in natural language Brian P. Gaucher, Dario Gil, Jeffrey O. Kephart, Jonathan Lenchner, David O. S. Melville +1 more 2016-11-01
9483267 Exploiting an architected last-use operand indication in a system operand resource pool Michael K. Gschwind 2016-11-01
9477469 Branch predictor suppressing branch prediction of previously executed branch instructions in a transactional execution environment Michael K. Gschwind, Chung-Lung K. Shum 2016-10-25
9477481 Accurate tracking of transactional read and write sets with speculation Michael K. Gschwind, Chung-Lung K. Shum 2016-10-25
9471371 Dynamic prediction of concurrent hardware transactions resource requirements and allocation Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum 2016-10-18
9465746 Diagnostics for transactional execution errors in reliable transactions Michael K. Gschwind 2016-10-11
9460020 Diagnostics for transactional execution errors in reliable transactions Michael K. Gschwind 2016-10-04
9454483 Salvaging lock elision transactions with instructions to change execution type Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum 2016-09-27
9448836 Alerting hardware transactions that are about to run out of space Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael 2016-09-20
9448939 Collecting memory operand access characteristics during transactional execution Dan F. Greiner, Michael K. Gschwind, Timothy J. Slegel 2016-09-20
9442853 Salvaging lock elision transactions with instructions to change execution type Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum 2016-09-13
9442775 Salvaging hardware transactions with instructions to transfer transaction execution control Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum 2016-09-13
9442776 Salvaging hardware transactions with instructions to transfer transaction execution control Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum 2016-09-13
9430273 Suppressing aborting a transaction beyond a threshold execution duration based on the predicted duration Jonathan D. Bradbury, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum +1 more 2016-08-30
9430276 Coalescing memory transactions Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum 2016-08-30
9424072 Alerting hardware transactions that are about to run out of space Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael 2016-08-23
9424036 Scalable decode-time instruction sequence optimization of dependent instructions Michael K. Gschwind 2016-08-23
9424071 Transaction digest generation during nested transactional execution Michael K. Gschwind 2016-08-23
9424037 Instructions and functions for evaluating program defined conditions Michael K. Gschwind 2016-08-23
9411589 Branch-free condition evaluation Michael K. Gschwind 2016-08-09
9389802 Hint instruction for managing transactional aborts in transactional memory computing environments Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael +2 more 2016-07-12
9383930 Code optimization to enable and disable coalescing of memory transactions Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum 2016-07-05
9384000 Caching optimized internal instructions in loop buffer Michael K. Gschwind 2016-07-05
9378022 Performing predecode-time optimized instructions in conjunction with predecode time optimized instruction sequence caching Michael K. Gschwind 2016-06-28