Issued Patents All Time
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7949867 | Secure communications | Ganapathy Nanjundeshwar, Pat Sankar | 2011-05-24 |
| 7941499 | Interprocessor message transmission via coherency-based interconnect | Becky Bruce, Michael D. Snyder, Gary L. Whisenhunt, Kumar K. Gala | 2011-05-10 |
| 7529799 | Method and apparatus for transaction tag assignment and maintenance in a distributed symmetric multiprocessor system | Manuel J. Alvarez, II, Kenneth D. Klapproth, David Mui | 2009-05-05 |
| 7502893 | System and method for reporting cache coherency state retained within a cache hierarchy of a processing node | — | 2009-03-10 |
| 7158666 | Method and apparatus for including virtual ads in video presentations | Praful Naphade, C. Rao, Kamal Bhadada, P. Venkat Rangan | 2007-01-02 |
| 6779036 | Method and apparatus for achieving correct order among bus memory transactions in a physically distributed SMP system | — | 2004-08-17 |
| 6725307 | Method and system for controlling data transfers with physical separation of data functionality from address and control functionality in a distributed multi-bus multiprocessor system | Manuel J. Alvarez, II, Joel Roger Davidson, Peter Geiger, Lawrence Powell, Praveen S. Reddy | 2004-04-20 |
| 6606676 | Method and apparatus to distribute interrupts to multiple interrupt handlers in a distributed symmetric multiprocessor system | Robert Kruse | 2003-08-12 |
| 6591348 | Method and system for resolution of transaction collisions to achieve global coherence in a distributed symmetric multiprocessor system | Tina Shui Wan Chan | 2003-07-08 |
| 6587930 | Method and system for implementing remstat protocol under inclusion and non-inclusion of L1 data in L2 cache to prevent read-read deadlock | Peter Steven Lenk, Michael John Mayfield | 2003-07-01 |
| 6516379 | Method and apparatus for transaction pacing to reduce destructive interference between successive transactions in a distributed symmetric multiprocessor system | Robert Kruse | 2003-02-04 |
| 6484220 | Transfer of data between processors in a multi-processor system | Manuel J. Alvarez, II, Kenneth D. Klapproth, David Mui | 2002-11-19 |
| 6467012 | Method and apparatus using a distributed system structure to support bus-based cache-coherence protocols for symmetric multiprocessors | Manuel J. Alvarez, II, Peter Geiger, Jeffrey H. Gruger | 2002-10-15 |
| 6449698 | Method and system for bypass prefetch data path | David Mui, Praveen S. Reddy | 2002-09-10 |
| 6442597 | Providing global coherence in SMP systems using response combination block coupled to address switch connecting node controllers to memory | Peter Geiger | 2002-08-27 |
| 6434638 | Arbitration protocol for peer-to-peer communication in synchronous systems | — | 2002-08-13 |
| 6381362 | Method and apparatus for including virtual ads in video presentations | Praful Naphade, C V K Rao, Kamal Bhadada, Venkat Rangan | 2002-04-30 |
| 6317811 | Method and system for reissuing load requests in a multi-stream prefetch design | David Mui | 2001-11-13 |
| 5802377 | Method and apparatus for implementing multiple interrupt controllers in a multi-processor computer system | — | 1998-09-01 |
| 5781757 | Adaptive scalable cache coherence network for a multiprocessor data processing system | — | 1998-07-14 |
| 5764998 | Method and system for implementing a distributed interrupt controller | — | 1998-06-09 |
| 5717853 | Information handling system having router including first mode for configuring itself, second mode for configuring its connected devices and third mode for system operation | Frank Eliot Levine | 1998-02-10 |
| 5692135 | Method and system for performing an asymmetric bus arbitration protocol within a data processing system | Manuel J. Alvarez, II, Gregory Hughes, Jeffrey Thomas Kreulen, Audrey D. Romonosky | 1997-11-25 |
| 5673413 | Method and apparatus for coherency reporting in a multiprocessing system | John Michael Kaiser | 1997-09-30 |