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Methods and apparatus for using multiple reassembly memories for performing multiple functions |
Gregg A. Bouchard, Mauricio Calle, Michael Hathaway, James T. Kirk, Christopher Brian Walton |
2014-07-15 |
| 7113518 |
Processor with reduced memory requirements for high-speed routing and switching of packets |
Mauricio Calle, Michael Hathaway, James T. Kirk |
2006-09-26 |
| 7079539 |
Method and apparatus for classification of packet data prior to storage in processor buffer memory |
Mauricio Calle, Betty A. McDaniel |
2006-07-18 |
| 6915480 |
Processor with packet data flushing feature |
Mauricio Calle, James T. Kirk, Betty A. McDaniel, Maurice A. Uebelhor |
2005-07-05 |
| 6804692 |
Method and apparatus for reassembly of data blocks within a network processor |
James T. Kirk, Mauricio Calle |
2004-10-12 |
| 6725307 |
Method and system for controlling data transfers with physical separation of data functionality from address and control functionality in a distributed multi-bus multiprocessor system |
Manuel J. Alvarez, II, Sanjay Deshpande, Peter Geiger, Lawrence Powell, Praveen S. Reddy |
2004-04-20 |
| 6718403 |
Hierarchical selection of direct and indirect counting events in a performance monitor unit |
Judith E. K. Laurens, Alexander Erik Mericas |
2004-04-06 |
| 6629170 |
Method and apparatus for a byte lane selectable performance monitor bus |
Michael Stephen Floyd, Paul J. Jordan, Judith E. K. Laurens, Alexander Erik Mericas, Kevin F. Reick |
2003-09-30 |
| 6574727 |
Method and apparatus for instruction sampling for performance monitoring and debug |
John Edward Derrick, Alexander Erik Mericas |
2003-06-03 |
| 6550002 |
Method and system for detecting a flush of an instruction without a flush indicator |
Hung Oui Le, Alexander Erik Mericas |
2003-04-15 |
| 6539502 |
Method and apparatus for identifying instructions for performance monitoring in a microprocessor |
Michael Stephen Floyd, Judith E. K. Laurens, Alexander Erik Mericas |
2003-03-25 |
| 6530042 |
Method and apparatus for monitoring the performance of internal queues in a microprocessor |
Judith E. K. Laurens, Alexander Erik Mericas |
2003-03-04 |
| 6446029 |
Method and system for providing temporal threshold support during performance monitoring of a pipelined processor |
Judith K. Laurens, Alexander Erik Mericas, Kevin F. Reick |
2002-09-03 |
| 6415378 |
Method and system for tracking the progress of an instruction in an out-of-order processor |
Judith K. Laurens, Alexander Erik Mericas, Kevin F. Reick, Joel M. Tendler |
2002-07-02 |
| 5619158 |
Hierarchical clocking system using adaptive feedback |
Humberto Felipe Casal, Hehching Harry Li, Yuan-Chang Lo, Trong D. Nguyen, Campbell H. Snyder +1 more |
1997-04-08 |
| 5613157 |
Address range extension for a modular computer |
Hehching Harry Li, Franklin Liu |
1997-03-18 |
| 4816805 |
Residue number system shift accumulator decoder |
William M. Vojir |
1989-03-28 |
