Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7437531 | Testing memories | Michael R. Spica, Md Rezwanur Rahman | 2008-10-14 |
| 6754867 | Method of determining non-accessible device I/O pin speed using on chip LFSR and MISR as data source and results analyzer respectively | Ajay Ojha | 2004-06-22 |
| 6311295 | System and method for testing a clock signal | Humberto Felipe Casal, David M. Wu | 2001-10-30 |
| 6161208 | Storage subsystem including an error correcting cache and means for performing memory to memory transfers | Patrick F. Dutton, Steven Lee Gregor | 2000-12-12 |
| 6023778 | Method and apparatus for utilizing mux scan flip-flops to test speed related defects by delaying an active to inactive transition of a scan mode signal | — | 2000-02-08 |
| 5917356 | Three state phase detector | Humberto Felipe Casal, Trong D. Nguyen | 1999-06-29 |
| 5822596 | Controlling power up using clock gating | Humberto Felipe Casal, Trong D. Nguyen, Nandor G. Thoma | 1998-10-13 |
| 5619158 | Hierarchical clocking system using adaptive feedback | Humberto Felipe Casal, Joel Roger Davidson, Yuan-Chang Lo, Trong D. Nguyen, Campbell H. Snyder +1 more | 1997-04-08 |
| 5613157 | Address range extension for a modular computer | Joel Roger Davidson, Franklin Liu | 1997-03-18 |
| 5581699 | System and method for testing a clock signal | Humberto Felipe Casal, David M. Wu | 1996-12-03 |
| 5121500 | Preliminary polling for identification and location of removable/replaceable computer components prior to power-up | David L. Arlington, Jacqueline K. Morris, Jerry K. Radcliffe | 1992-06-09 |
| 4888773 | Smart memory card architecture and interface | David L. Arlington, Jacqueline M. Cole, Bruce G. Hazelzet, David J. Krolak, Bharat J. Oza +1 more | 1989-12-19 |